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Automated Synthesis of Memristor Crossbars Using Deep Neural Networks

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Part of the book series: Advances in Intelligent Systems and Computing ((AISC,volume 1177))

Abstract

We present a machine learning based approach for automatically synthesizing a memristor crossbar design from the specification of a Boolean formula. In particular, our approach employs deep neural networks to explore the design space of crossbar circuits and conjecture the design of an approximately correct crossbar. Then, we employ simulated annealing to obtain the correct crossbar design from the approximately correct design. Our experimental investigations show that the deep learning system is able to prune the search space to less than \(0.0000011\%\) of the original search space with high probability; thereby, making it easier for the simulated annealing algorithm to identify a correct crossbar design. We automatically design an adder, subtractor, comparator, and parity circuit using this combination of deep learning and simulated annealing, and demonstrate their correctness using circuit simulations. We also compare our approach to vanilla simulated annealing without the deep learning component, and show that our approach needs only 6.08% to 69.22% of the number of circuit simulation queries required by simulated annealing alone.

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References

  1. Szegedy, C., Liu, W., Jia, Y., Sermanet, P., Reed, S., Anguelov, D., Erhan, D., Vanhoucke, V., Rabinovich, A.: Going deeper with convolutions. In: Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, pp. 1–9 (2015)

    Google Scholar 

  2. Blunsom, P., Cho, K., Dyer, C., Schütze, H.: From characters to understanding natural language (c2nlu): robust end-to-end deep learning for NLP (dagstuhl seminar 17042). In: Dagstuhl Reports, vol. 7, no. 1. Schloss Dagstuhl-Leibniz-Zentrum fuer Informatik (2017)

    Google Scholar 

  3. Andersson, O., Wzorek, M., Doherty, P.: Deep learning quadcopter control via risk-aware active learning. In: AAAI, pp. 3812–3818 (2017)

    Google Scholar 

  4. Sünderhauf, N., Brock, O., Scheirer, W., Hadsell, R., Fox, D., Leitner, J., Upcroft, B., Abbeel, P., Burgard, W., Milford, M., et al.: The limits and potentials of deep learning for robotics. Int. J. Robot. Res. 37(4–5), 405–420 (2018)

    Article  Google Scholar 

  5. LeCun, Y., Bengio, Y., Hinton, G.: Deep learning. Nature 521(7553), 436 (2015)

    Google Scholar 

  6. Gibney, E.: Google ai algorithm masters ancient game of go. Nat. News 529(7587), 445 (2016)

    Article  Google Scholar 

  7. Chakraborty, D., Jha, S.K.: Automated synthesis of compact crossbars for sneak-path based in-memory computing. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 770–775. IEEE (2017)

    Google Scholar 

  8. Thangkhiew, P.L., Zulehner, A., Wille, R., Datta, K., Sengupta, I.: An efficient memristor crossbar architecture for mapping Boolean functions using binary decision diagrams (BDD). Integration (2019). http://www.sciencedirect.com/science/article/pii/S0167926019301646

  9. Xie, L.: Mosaic: an automated synthesis flow for Boolean logic based on memristor crossbar. In: Proceedings of the 24th Asia and South Pacific Design Automation Conference, ser. ASPDAC 19. New York, NY, USA: Association for Computing Machinery, pp. 432–437 (2019). https://doi.org/10.1145/3287624.3287702

  10. Pannu, J.S., Raj, S., Fernandes, S.L., Jha, S.K., Chakraborty, D., Rafiq, S., Cady, N.: Data-driven approximate edge detection using flow-based computing on memristor crossbars. In: 2019 IEEE Albany Nanotechnology Symposium (ANS), Nov 2019, pp. 1–6

    Google Scholar 

  11. Falcini, F., Lami, G., Costanza, A.M.: Deep learning in automotive software. IEEE Softw. 3, 56–63 (2017)

    Article  Google Scholar 

  12. Kvatinsky, S., Belousov, D., Liman, S., Satat, G., Wald, N., Friedman, E.G., Kolodny, A., Weiser, U.C.: Magic memristor-aided logic. IEEE Transa. Circuits Syst. II: Express Briefs 61(11), 895–899 (2014)

    Article  Google Scholar 

  13. Kvatinsky, S., Satat, G., Wald, N., Friedman, E.G., Kolodny, A., Weiser, U.C.: Memristor-based material implication (imply) logic: design principles and methodologies. IEEE Trans. Very Large Scale Integr. (VLSI) Syst. 22(10), 2054–2066 (2014)

    Google Scholar 

  14. Lehtonen, E., Laiho, M.: Stateful implication logic with memristors. In: Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, ser. NANOARCH ’09. Washington, DC, USA: IEEE Computer Society, pp. 33–36. https://doi.org/10.1109/NANOARCH.2009.5226356 (2009)

  15. Prezioso, M., Riminucci, A., Graziosi, P., Bergenti, I., Rakshit, R., Cecchini, R., Vianelli, A., Borgatti, F., Haag, N., Willis, M., Drew, A.J., Gillin, W.P., Dediu, V.A.: A single-device universal logic gate based on a magnetically enhanced memristor. Adv. Mater. 25(4), 534–538. https://doi.org/10.1002/adma.201202031

  16. Haj-Ali, A., Ben-Hur, R., Wald, N., Kvatinsky, S.: Efficient algorithms for in-memory fixed point multiplication using magic. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1–5. IEEE (2018)

    Google Scholar 

  17. Shirinzadeh, S., Drechsler, R., Logic synthesis for in-memory computing using resistive memories. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 375–380. IEEE (2018)

    Google Scholar 

  18. Vatwani, T., Dutt, A., Bhattacharjee, D., Chattopadhyay, A.: Floating point multiplication mapping on reram based in-memory computing architecture. In: 2018 31st International Conference on VLSI Design and 2018 17th International Conference on Embedded Systems (VLSID), pp. 439–444. IEEE (2018)

    Google Scholar 

  19. Bhattacharjee, D., Devadoss, R., Chattopadhyay, A., Revamp: Reram based VLIW architecture for in-memory computing. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 782–787. IEEE (2017)

    Google Scholar 

  20. Reuben, J., Ben-Hur, R., Wald, N., Talati, N., Ali, A.H., Gaillardon, P.-E., Kvatinsky, S.: Memristive logic: a framework for evaluation and comparison. In: 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 1–8. IEEE (2017)

    Google Scholar 

  21. Jo, S.H., Chang, T., Ebong, I., Bhadviya, B.B., Mazumder, P., Lu, W.: Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett. 10(4), 1297–1301 (2010)

    Article  Google Scholar 

  22. Hu, M., Li, H., Chen, Y., Wu, Q., Rose, G.S., Linderman, R.W.: Memristor crossbar-based neuromorphic computing system: a case study. IEEE Trans. Neural Netw. Learn. Syst. 25(10), 1864–1878 (2014)

    Article  Google Scholar 

  23. Prezioso, M., Merrikh-Bayat, F., Hoskins, B., Adam, G., Likharev, K.K., Strukov, D.B.: Training and operation of an integrated neuromorphic network based on metal-oxide memristors. Nature 521(7550), 61 (2015)

    Article  Google Scholar 

  24. Schuller, I.K., Stevens, R., Pino, R., Pechan, M.: Neuromorphic computing-from materials research to systems architecture roundtable. Technical Report, USDOE Office of Science (SC)(United States) (2015)

    Google Scholar 

  25. Chu, M., Kim, B., Park, S., Hwang, H., Jeon, M., Lee, B.H., Lee, B.-G.: Neuromorphic hardware system for visual pattern recognition with memristor array and cmos neuron. IEEE Trans. Ind. Electron. 62(4), 2410–2419 (2015)

    Article  Google Scholar 

  26. Kim, K.-H., Gaba, S., Wheeler, D., Cruz-Albrecht, J.M., Hussain, T., Srinivasa, N., Lu, W.: A functional hybrid memristor crossbar-array/cmos system for data storage and neuromorphic applications. Nano Lett. 12(1), 389–395 (2011)

    Article  Google Scholar 

  27. Serrano-Gotarredona, T., Prodromakis, T., Linares-Barranco, B.: A proposal for hybrid memristor-cmos spiking neuromorphic learning systems. IEEE Circuits Syst. Mag. 13(2), 74–88 (2013)

    Article  Google Scholar 

  28. Chakraborti, S., Chowdhary, P.V., Datta, K., Sengupta, I.: BDD based synthesis of Boolean functions using memristors. In: 2014 9th International Design & Test Symposium (IDT), vol. 00, Dec. 2014, pp. 136–141. https://doi.org/10.1109/IDT.2014.7038601

  29. Hassen, A.U., Chakraborty, D., Jha, S.K.: Free binary decision diagram-based synthesis of compact crossbars for in-memory computing. IEEE Trans. Circuits Syst. II: Express Briefs 65(5), 622–626 (2018)

    Article  Google Scholar 

  30. Alamgir, Z., Beckmann, K., Cady, N., Velasquez, A., Jha, S.K.: Flow-based computing on nanoscale crossbars: design and implementation of full adders. In: IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1870–1873. IEEE (2016)

    Google Scholar 

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Correspondence to Steven L. Fernandes .

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Chakraborty, D. et al. (2021). Automated Synthesis of Memristor Crossbars Using Deep Neural Networks. In: Satapathy, S., Zhang, YD., Bhateja, V., Majhi, R. (eds) Intelligent Data Engineering and Analytics. Advances in Intelligent Systems and Computing, vol 1177. Springer, Singapore. https://doi.org/10.1007/978-981-15-5679-1_32

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