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On-Chip Threshold Compensated Voltage Doubler for RF Energy Harvesting

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Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1066))

Abstract

This paper presents a new threshold voltage compensation scheme for voltage doubler in-order to convert radio frequency (RF) energy to direct current (DC) energy for RF energy harvesting applications. The proposed scheme utilizes a chain of diode connected MOS transistors instead of secondary battery or large off-chip resistors, for minimizing losses due to the MOSFET threshold voltage. The proposed doubler is suitable for RFID applications where targeted supply voltage is 0.5 V. The voltage doubler has been designed and simulated in UMC’s 0.18 \(\upmu \)m CMOS technology node. It achieves a peak power conversion efficiency (PCE) of 48% at an input power of −12 dBm for an output DC voltage of 0.5 V, and hence suitable for ultra-low power applications.

Supported by BITS Pilani, Hyderabad.

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Correspondence to Arun Mohan .

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Mohan, A., Mondal, S., Dan, S.S. (2019). On-Chip Threshold Compensated Voltage Doubler for RF Energy Harvesting. In: Sengupta, A., Dasgupta, S., Singh, V., Sharma, R., Kumar Vishvakarma, S. (eds) VLSI Design and Test. VDAT 2019. Communications in Computer and Information Science, vol 1066. Springer, Singapore. https://doi.org/10.1007/978-981-32-9767-8_16

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  • DOI: https://doi.org/10.1007/978-981-32-9767-8_16

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  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-32-9766-1

  • Online ISBN: 978-981-32-9767-8

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