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International Symposium on VLSI Design and Test

VDAT 2019: VLSI Design and Test pp 579–589Cite as

A Novel Design of SRAM Using Memristors at 45 nm Technology

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Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1066))

Abstract

There is an ever-increasing need for low-cost, higher density, lowpower and high-performance memory devices. Memristor is one of the most promising device for obtaining memories as it offers smaller area and lower consumption. In the proposed work memristor-based SRAM circuit has been designed by using 45 nm technology of Predictive Technology Model. The read time of 1-bit cell is 5 ps and the write time 7 ps. Total area of the cell is 3.861 µm2.

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Acknowledgement

We would like to thank Director, CSIR-CEERI Pilani, Rajasthan, India for providing access to Cadence Virtuoso and the requisite technical support through SMDP-C2SD project, sponsored by MeitY, India. We would also like to thank Dr. P. Sivaraman and Mr. Radhakrishnan of the ECE Department at PSG College of Technology for letting us to continue a part of our work in their VLSI design laboratory.

Author information

Authors and Affiliations

  1. Birla Institute of Technology and Science Pilani Hyderabad Campus, Hyderabad, 500078, Telangana, India

    V. Jeffry Louis

  2. CSIR- Central Electronics Engineering Research Institute (CEERI), Pilani, 333031, Rajasthan, India

    Jai Gopal Pandey

Authors
  1. V. Jeffry Louis
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  2. Jai Gopal Pandey
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Corresponding author

Correspondence to Jai Gopal Pandey .

Editor information

Editors and Affiliations

  1. Computer Science and Engineering, Indian Institute of Technology Indore, Indore, India

    Anirban Sengupta

  2. Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Roorkee, India

    Sudeb Dasgupta

  3. Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India

    Virendra Singh

  4. Department of Electrical Engineering, Indian Institute of Technology Ropar, Rupnagar, India

    Rohit Sharma

  5. Electrical Engineering, Indian Institute of Technology Indore, Indore, India

    Santosh Kumar Vishvakarma

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Jeffry Louis, V., Gopal Pandey, J. (2019). A Novel Design of SRAM Using Memristors at 45 nm Technology. In: Sengupta, A., Dasgupta, S., Singh, V., Sharma, R., Kumar Vishvakarma, S. (eds) VLSI Design and Test. VDAT 2019. Communications in Computer and Information Science, vol 1066. Springer, Singapore. https://doi.org/10.1007/978-981-32-9767-8_48

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  • DOI: https://doi.org/10.1007/978-981-32-9767-8_48

  • Published:

  • Publisher Name: Springer, Singapore

  • Print ISBN: 978-981-32-9766-1

  • Online ISBN: 978-981-32-9767-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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