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International Symposium on VLSI Design and Test

VDAT 2019: VLSI Design and Test pp 667–678Cite as

Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model

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Part of the book series: Communications in Computer and Information Science ((CCIS,volume 1066))

Abstract

The charge based compact model for Drain-Extended MOS (DEMOS) transistor is presented in this work. Proposed model accurately predicts the special effects of quasi-saturation, present in high voltage MOSFETs. Modeling methodology used in this paper includes the drift resistance model based on intrinsic drain current, and low voltage BSIM-BULK model. Developed model along with the BSIM-BULK compact model can be used for the modeling of low voltage bulk MOSFETs to DEMOS transistors. Proposed model results are validated with Technology Computer-Aided Design (TCAD) DEMOS data. The model is accurately capturing the impact of drift region on DC I-V characteristics and their derivatives.

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Authors and Affiliations

  1. Department of Electronics and Instrumentation Engineering, Shri G. S. Institute of Technology and Science, Indore, India

    Shivendra Singh Parihar & Ramchandra Gurjar

Authors
  1. Shivendra Singh Parihar
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  2. Ramchandra Gurjar
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Correspondence to Shivendra Singh Parihar .

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Editors and Affiliations

  1. Computer Science and Engineering, Indian Institute of Technology Indore, Indore, India

    Anirban Sengupta

  2. Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee, Roorkee, India

    Sudeb Dasgupta

  3. Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India

    Virendra Singh

  4. Department of Electrical Engineering, Indian Institute of Technology Ropar, Rupnagar, India

    Rohit Sharma

  5. Electrical Engineering, Indian Institute of Technology Indore, Indore, India

    Santosh Kumar Vishvakarma

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Parihar, S.S., Gurjar, R. (2019). Compact Modeling of Drain-Extended MOS Transistor Using BSIM-BULK Model. In: Sengupta, A., Dasgupta, S., Singh, V., Sharma, R., Kumar Vishvakarma, S. (eds) VLSI Design and Test. VDAT 2019. Communications in Computer and Information Science, vol 1066. Springer, Singapore. https://doi.org/10.1007/978-981-32-9767-8_55

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  • DOI: https://doi.org/10.1007/978-981-32-9767-8_55

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