Abstract
This paper addresses the problem of implementing narrow-band FIR filters using FPGAs. Rather than employing a conventional multiply-accumulate unit to compute the inner-product, an alternative method based on re-quantization of the input data stream using a sigma-delta modulator is presented. The re-quantization process preserves the dynamic range of the signal components contained in the bandwidth of the filter, while shifting the re-quantization noise to the spectral region to be rejected by the filter. The reduced bit length representation of the re-quantized input data samples removes the requirment for a full multiplier in the filter hardware. This makes the method very attractive for realization using FPGA technology. The filtering technique is described and implementation results using a Xilinx XC4010 FPGA are presented. A 200-tap filter implemented in a single FPGA achieves a computation rate of 415 MOPS and has a memory bandwidth of 1.66 Gbytes/s. An extension of the method using a quadrature re-quantizer and filter is also presented.
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Dick, C., Harris, F. Narrow-band FIR filtering with FPGAs using sigma-delta modulation encoding. J VLSI Sign Process Syst Sign Image Video Technol 14, 265–282 (1996). https://doi.org/10.1007/BF00929620
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DOI: https://doi.org/10.1007/BF00929620