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A case for digit serial VLSI signal processors

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Abstract

Digit serial architectures, which have digit serial data transmission combined with digit serial computation, are uniquely suited for the design of VLSI signal processors. The speed disadvantages of digit serial input are overcome if the input is overlapped with the computation—what we refer to as digit pipelining. Digit pipelining allows us to break up long strings of combinatorial logic and, thus, to increase the clock rate of the system while still preserving much of the circuit structure. In general, for a modest increase in hardware (which in VLSI translates to a modest increase in area) digit serial architectures offer the potential of higher throughput than equivalent word parallel architectures. Several designs for various digit serial adders are presented. Then two filter examples are discussed that use the digit serial adders to achieve digit pipelining.

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Authors and Affiliations

  1. Department of Computer Science, The Pennsylvania State University, 16802, University Park, PA

    Mary Jane Irwin & Robert Michael Owens

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  1. Mary Jane Irwin
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  2. Robert Michael Owens
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Irwin, M.J., Owens, R.M. A case for digit serial VLSI signal processors. J VLSI Sign Process Syst Sign Image Video Technol 1, 321–334 (1990). https://doi.org/10.1007/BF00929925

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  • DOI: https://doi.org/10.1007/BF00929925

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