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CSP-based object-oriented description and simulation of a reconfigurable adaptive beamforming architecture using the OODRA workbench

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Abstract

Application of the Object-Oriented Design of Reliable/Reconfigurable Architectures (OODRA) workbench to the performance simulation of a reconfigurable adaptive digital beamforming architecture is described in this paper. The performance effects due to chip/wafer partitioning and reconfiguration for fault tolerance and yield enhancement are presented. The experiments described illustrate use of the OODRA workbench in architectural-level performance evaluation of algorithm-specific reconfigurable architectures, particularly for signal processing applications.

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Authors and Affiliations

  1. Computer Systems Group, Coordinated Science Laboratory, University of Illinois, 1101 W. Springfield Ave., 61801, Urbana, IL

    Thomas L. Wernimont, David K. Hwang & W. Kent Fuchs

Authors
  1. Thomas L. Wernimont
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  2. David K. Hwang
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  3. W. Kent Fuchs
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Additional information

This research was supported in part by SDIO/IST and managed by the Office of Naval Research under contract N00014-89-K-0070 and in part by the Semiconductor Research Corporation under Contract 88-DP-109. Portions of this paper were presented at the IEEE International Conference on Wafer Scale Integration, January 1989, and the ACM/IEEE Design Automation Conference, June 1989.

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Wernimont, T.L., Hwang, D.K. & Fuchs, W.K. CSP-based object-oriented description and simulation of a reconfigurable adaptive beamforming architecture using the OODRA workbench. J VLSI Sign Process Syst Sign Image Video Technol 2, 159–172 (1990). https://doi.org/10.1007/BF00935213

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  • DOI: https://doi.org/10.1007/BF00935213

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