Skip to main content
Log in

Packing directed circuits fractionally

  • Published:
Combinatorica Aims and scope Submit manuscript

Abstract

LetG be a digraph, and letk≥1, such that no “fractional” packing of directed circuits ofG has value >k, when every vertex is given “capacity” 1. We prove there is a set ofO (k logk logk) vertices meeting all directed circuits ofG.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. N. Alon, andJ. H. Spencer:The Probabilistic Method, Wiley, 1991.

  2. A. Lubotzky, R. Phillips, andP. Sarnak: Ramanujan graphs,Combinatorica 8 (1988), 261–277.

    Google Scholar 

  3. G. A. Margulis: Explicit group-theoretical constructions of combinatorial schemes and their application to the design of expanders and superconcentrators,Problemy Pederachi Informatsii 24 (1988), 51–60 (in Russian). English translation inProblems of Information Transmission 24 (1988), 39–46.

    Google Scholar 

  4. W. McCuaig: Intercyclic digraphs,Graph Structure Theory (Neil Robertson and Paul Seymour, eds.), AMS Contemporary Math., (147) 1991, 203–245.

  5. D. H. Younger: Graphs with interlinked directed circuits,Proceedings of the Midwest Symposium on Circuit Theory 2 (1973), XVI 2.1-XVI 2.7.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Seymour, P.D. Packing directed circuits fractionally. Combinatorica 15, 281–288 (1995). https://doi.org/10.1007/BF01200760

Download citation

  • Received:

  • Revised:

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF01200760

Mathematics Subject Classification (1991)

Navigation