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An image-recognition system using algorithmically dedicated integrated circuits

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Abstract

An image-recognition system was implemented with a set of eight algorithmically dedicated integrated circuits to recognize two-dimensional objects that are characterized by their closed outer contours. The complete system operates at rates up to 15 frames/second using a standard workstation as a controller. The recognition system achieved a 97% recognition rate for over 10,000 trials of recognition of eight objects over a wide range of orientation and size variations. A 100% recognition rate was achieved if size variations were eliminated. The set of 4-micron NMOS image processor chips operates on 10-megahertz 8-bit video data (512 × 512 images) in real time. The processors include: a 3 × 3 linear convolver, a 3 × 3 sorting filter, a 7 × 7 logical convolver, a contour tracer, a feature extractor, a look-up table ROM, and two post-processors for the linear convolver. Each chip was designed using an architecture that is dedicated to the particular image processing task being performed. The design time for all of the chips was kept to 1.5 man-years by developing a set of design guidelines. The relationship between the algorithms that were implemented and the silicon implementation is discussed.

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Ruetz, P.A., Brodersen, R.W. An image-recognition system using algorithmically dedicated integrated circuits. Machine Vis. Apps. 1, 3–22 (1988). https://doi.org/10.1007/BF01212309

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