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A programmable VLSI retina for rough vision

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Abstract

A VLSI retina is a device that intimately associates an optoelectronic layer with processing facilities on a monolithic circuit. Combining acquisition and processing provides a better balance between between data flows and bandwidths. It is also expected to reveal fruitful shortcuts between microelectronic phenomena and vision-oriented information processing. Yet, except for simplistic environments and applications, analog hardware will not suffice to process and compact the raw image flow from photosensitive arrays. To solve this output problem, an on-chip array of bare boolean processors can be used to provide versatility from programmability. Since the monolithic constraint implies a memory shortage, the abilities of such a retina will be limited to a rough type of vision, but specific algorithmic techniques can cope with it. We have used shift registers with some tricky circuitry to build a minimal retina boolean processor with less than 30 transistors. The successful integration and testing of and experimentation with such a 65×76 retina are presented.

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Authors and Affiliations

  1. Laboratoire Systéme de Perception, ETC A, 16bis Av. Prieur de la Côte d'Or, F-94114, Arcueil Cedex, France

    T. M. Bernard, P. E. Nguyen & B. Y. Zavidovique

  2. Institut d'Electronique Fondamentale, Bat. 220, Université de Paris Sud, F-91405, Orsay Cedex, France

    F. J. Devos & B. Y. Zavidovique

Authors
  1. T. M. Bernard
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  2. P. E. Nguyen
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  3. F. J. Devos
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  4. B. Y. Zavidovique
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Correspondence to T. M. Bernard.

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Bernard, T.M., Nguyen, P.E., Devos, F.J. et al. A programmable VLSI retina for rough vision. Machine Vis. Apps. 7, 4–11 (1993). https://doi.org/10.1007/BF01212411

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  • DOI: https://doi.org/10.1007/BF01212411

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