Abstract
The results of a study of a family of parallel symbolic architectures executing several parallel applications are presented. The class of architectures being simulated is characterized by a shared memory structure, by a hierarchical interconnect, and by clustered processors. Speedup measurements were obtained from six different application kernels. Measurements were also performed to assess the degradation of speedup as a function of the interconnection delays, and to study the effect of different scheduling algorithms. The results presented support the claim that the proposed architecture would be a powerful parallel symbolic computation system. The paper discusses processor starvation, fine grain parallelism, unever loads, foreign reference, schedule and indeterminate computation with respect to the applications chosen.
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This work was completed within the Advanced Computer Architecture Program, Micro-electronics and Technology Computer Corporation, Austin, Texas.
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Guzman, A., Krall, E.J., McGehearty, P.F. et al. Performance of symbolic applications on a parallel architecture. Int J Parallel Prog 16, 183–214 (1987). https://doi.org/10.1007/BF01407933
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DOI: https://doi.org/10.1007/BF01407933