Abstract
Analog sub-threshold is an attractive microelectronic implementation approach for many applications where power is to be minimized. The process of mapping a neural network to a sub-threshold architecture requires the proper selection of a training algorithm. For analog architectures, conventional training algorithms like backpropagation have many drawbacks although they are computationally efficient on digital computers. In this article we present algorithms that are suitable for analog implementation and we present architectures and implementations of sub-threshold neural networks.
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Jabri, M., Pickard, S., Leong, P. et al. Algorithmic and implementation issues in analog low power learning neural network chips. J VLSI Sign Process Syst Sign Image Video Technol 6, 67–76 (1993). https://doi.org/10.1007/BF01581960
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DOI: https://doi.org/10.1007/BF01581960