Skip to main content
SpringerLink
Log in

A generalized state assignment theory for transformations on signal transition graphs

  • Published:
Journal of VLSI signal processing systems for signal, image and video technology Aims and scope Submit manuscript

Abstract

In this article, we propose a global assignment theory forencoding state graph transformations. A constraint satisfaction framework is proposed that can guaranteenecessary and sufficient conditions for a state graph assignment to result in a transformed state graph that is free of critical races. Performing transformations at the state graph level has the advantage that the requirements imposed on the initial STG are very weak. Unlike previous methods, the initial STG need not be a live, safe, nor a free choice net. The only requirement is that the corresponding initial state graph is finite, connected, and has a consistent state assignment. Hence, a very broad range of signal transition graphs can be synthesized. The transformations achievable using the proposed framework correspond to very complex transformations on signal transition graphs. Even transformations that convert a free choice net into a correct non-free choice net and a 1-safe net into a correct 2-safe net are feasible. Addition of transitions that do not follow the Petri net firing rule is also possible. Even though our method can search a large solution space, we will show that it is possible to solve the problem in an exact way in acceptable CPU times in many practical cases.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. T.A. Chu, “Synthesis of self-timed VLSI circuits from graphtheoretic specifications,” Ph.D. thesis, MIT, June 1987.

  2. Teresa H. Meng,Synchronization Design for Digital Systems. Boston, MA: Kluwer Academic Publishers, 1991.

    Book  Google Scholar 

  3. S.H. Unger,Asynchronous Sequential Switching Circuits. Wiley Interscience, 1969.

  4. L. Lavagno, K. Keutzer, and A. Sangiovanni-Vincentelli, “Algorithms for synthesis of hazard-free asynchronous circuits,”Proceedings of the Design Automation Conference, June 1991.

  5. P. Vanbekbergen, “Optimized synthesis of asynchronous control circuits from graph-theoretic specifications,”Proceedings of the International Conference on Computer-Aided Design, pp. 184–187, November 1990.

  6. A.V. Yakovlev and A. Petrov, “Petri nets and parallel bus controller design,”International Conference on Application and Theory of Petri Nets, Paris, France, June 1990, pp. 245–263.

  7. T. Murata, “Petri nets: Properties, analysis and applications,”Proceedings of the IEEE, April 1989, pp. 541–580.

  8. L. Lavagno, C.W. Moon, R.K. Brayton, and A. SangiovanniVincentelli, “Solving the state assignment problem for signal transition graphs,”Proceedings of the Design Automation Conference, June 1992.

  9. J.H. Tracey, “Internal state assignments for asynchronous sequential machines,”IEEE Transactions on Electronic Computers, vol. EC-15, 1966, pp. 551–560.

    Article  Google Scholar 

  10. M.A. Kishinevsky, A.Y. Kondratyev, and A.R. Taubin, “Formal method for self-timed design,”Proceedings of the European Design Automation Conference, 1991.

  11. V.I. Varshavsky, M.A. Kishinevsky, A.Y. Kondratyev, L.Y. Rosenblum, and A.R. Taubin, “Models for specification and analysis of processes in asynchronous circuits,”Soviet Journal of Computer and Systems Sciences, 1989.

  12. C.A.R. Hoare, “Communicating sequential processes,”Communications of the ACM, 1978, pp. 666–677.

  13. J.E. Hopcroft and J.D. Ullman,Introduction to Automata Theory, Languages and Computation. Reading, MA: Addison-Wesley, 1979.

    MATH  Google Scholar 

  14. P. Vanbekbergen, “Synthesis of asynchronous control circuits from graph-theoretic specifications,” Ph.D. thesis, Catholic University of Leuven, ESAT, 1992. To appear.

  15. T. Larrabee, “Test pattern generation using Boolean satisfiability,”IEEE Transactions on CAD, vol. 11, 1992.

  16. Paul R. Stephan, Robert K. Brayton, and Alberto L. Sangiovanni-Vincentelli, “Combinational test generation using satisfiability,” Technical Report UCB/ERL M92/112, ucb, October 1992.

  17. P. Vanbekbergen et al., “A generalized state assignment theory for transformations on signal transition graphs,”Proceedings of the International Conference on Computer-Aided Design, 1992.

Download references

Author information

Authors and Affiliations

  1. IMEC Laboratory, Kapeldreef 75, B-3001, Leuven, Belgium

    Peter Vanbekbergen, Bill Lin & Gert Goossens

  2. ESAT Laboratory, Katholieke Universiteit, K. Mercierlaan 94, B-3001, Leuven, Belgium

    Hugo de Man

Authors
  1. Peter Vanbekbergen
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Bill Lin
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Gert Goossens
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. Hugo de Man
    View author publications

    You can also search for this author in PubMed Google Scholar

Additional information

Research supported by the ESPRIT 2260 (SPRITE) program of the EC.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Vanbekbergen, P., Lin, B., Goossens, G. et al. A generalized state assignment theory for transformations on signal transition graphs. Journal of VLSI Signal Processing 7, 101–115 (1994). https://doi.org/10.1007/BF02108192

Download citation

  • Received:

  • Revised:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF02108192

Keywords

Search

Navigation