Summary
A counter is calculationally designed by applying a functional way of programming, in which a machine is conceived as a function from states to behaviours. The design exploits the fine-grained concurrency available in VLSI. It is obtained by applying a series of correctness-preserving transformations on an initial design, which satisfies the functional specification but does not meet the cost/performance requirements. The transformations are purely calculational, i.e. they are based on a few simple axioms. The design is generic in that it describes counters with all possible periods. An attractive property of the design is that all these counters have the same response time as well as the same power dissipation.
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Joep Kessels is a senior scientist at Philips Research Laboratories. He was involved in projects on applicative programming, distributed processing and local area networks. Currently he is engaged in a project on designing asynchronous VLSI circuits. His main research interests are design methodology and distributed processing.
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Kessels, J.L.W. Calculational derivation of a counter with bounded response time and bounded power dissipation. Distrib Comput 8, 143–149 (1995). https://doi.org/10.1007/BF02242716
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DOI: https://doi.org/10.1007/BF02242716