Abstract
We present a radix-8 divider that uses an over-redundant digit set for the quotient in order to obtain simple digit selection rules. We show that the proposed enlarged set of values for the quotient digit does not lead to increases both in the complexity and the delay of the adder required to update the remainder, with respect to similar solutions, since the values allowed for the quotient digit have been selected carefully. The digit selection process is subdivided into two concurrent steps, each one making reference to a secondary digit set and the resulting implementation can be cheaper and faster than other units which do not use over-redundant digit sets. A performance analysis estimates a speed improvement from 25% to 35% with respect to a radix-8 architecture by Fandrianto, and from 21% to 30% with respect to a radix-4 architecture with prescaling, presented by Ercegovac and Lang. As required from the IEEE 754 floating point standard, the proposed algorithm features the correct remainder of the division.
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Montuschi, P., Ciminiera, L. Radix-8 division with over-redundant digit set. Journal of VLSI Signal Processing 7, 259–270 (1994). https://doi.org/10.1007/BF02409402
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DOI: https://doi.org/10.1007/BF02409402