Skip to main content
Log in

Adaptive memory coherence algorithms in DSVM

  • Published:
Journal of Computer Science and Technology Aims and scope Submit manuscript

Abstract

Based on the characteristics of distrubuted system and the behavior of parallel programs, this paper presents the fixed and randomized competitive memory coherence algorithms for distributed shared virtual memory. These algorithms exploit parallel programs' locality of reference and exhibit good competitive property. Our simulation shows that the fixed and randomized algorithms achieve better performance and higher stability than other strategies such as write-invalidate and write-update.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. Karlin A R, Manasse M S, Rudolph L, Sleator D D. Competitive snoopy caching.Algorithmica, 1988, 3: 79–119.

    Article  MATH  MathSciNet  Google Scholar 

  2. Li Kai, Hudak Paul. Memory coherence in shared virtual memory systems.ACM Trans. Computer Systems, 1989, 7(4): 321–359.

    Article  Google Scholar 

  3. Karlin A R, Manasse M S, McGeoch L, Owicki S. Competitive randomized algorithms for non-uniform programs, In: The 1st Annual ACM Symp. on Discrete Algorithms, 1989, pp. 301–309.

  4. Archibald J, Baer J-L. Cache coherence protocols: Evaluation using a multiprocessor simulation model.ACM Trans. Computer Systems, 1986, 4(4): 273–298.

    Article  Google Scholar 

  5. Bennett J, Carter J, Zwaenepoel W. Munin: Distributed shared memory based on type-specific memory coherence. In: Proc. 1990 Conf. on Principles and Practice of Parallel Programming, March 1990, pp. 168–176.

  6. Bennett J K, Carter J B, Zwaenepoel W. Adaptive software management for distributed shared memory architectures. In: Conf. Proc. of the 17th Annual Int'l Symp. Computer Architecture, Seattle, Washington, May 1990, PP. 125–134.

  7. Eggers S J, Katz R H. A characterization of sharing in parallel programs and its application to coherence protocol evaluation. In: Proc. of the 15th Annual Int'l Symp. Computer Architecture, Honolulu, June 1988, pp. 373–383.

  8. Goodman J R. Using cache memory to reduce processor-memory traffic. In: Proc. of the 10th Int'l Symp. on Computer Architecture, IEEE, New York, 1983, pp. 124–131.

  9. Lee R L, Yew P C, Lawrie D M. Multiprocessor cache design considerations. In: Conf. Proc. of the 14th Annual Int'l Symp. on Computer Architecture, pp. 253–262.

  10. Thacker C P, Stewart L C. Firefly: A multiprocessor workstation. In: Proc. of the 2nd Int'l Conf. on Architectural Support for Programming Languages and Operating Systems, October 1987, pp. 164–172.

Download references

Author information

Authors and Affiliations

Authors

Rights and permissions

Reprints and permissions

About this article

Cite this article

Zhou, J., Xie, L., Dai, F. et al. Adaptive memory coherence algorithms in DSVM. J. of Comput. Sci. & Technol. 9, 365–372 (1994). https://doi.org/10.1007/BF02943583

Download citation

  • Received:

  • Revised:

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF02943583

Keywords

Navigation