Skip to main content
Log in

Logic circuit synthesis using Prolog

  • Short Notes
  • Published:
New Generation Computing Aims and scope Submit manuscript

Abstract

This paper briefly reviews the current use of CAD in logic design, and then describes an expert system used to synthesize logic circuits. Specialized knowledge dealing with standard TTL ICs is written in Prolog and AGE, and the results are compared.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

References

  1. Kawato, N., Saito, T. and Uehara, T.: “Design and Verification of Large Scale Computers by Using DDL”, Proc. 16th Design Automation Conf. (1979) 360.

  2. Uehara, T., Maruyama, F., Saito, T. and Kawato, N.: “DDL Verifier”, Proc. of 5th Int. Conf. on Computer Hardware Description Languages and Their Applications (1981) 51.

  3. Winston, P. H.: “Artificial Intelligence” (Addison-Wesley, 1977).

  4. Nii, H. P. and Aiello, N.: “AGE: A Knowledge-based Program for Building Knowledge-based Programs”, Proc. IJCAI-79 (1979) 645.

  5. Stefic, M. J.: “Planning with Constraints” (Stanford University, 1980).

  6. Kawato, N., Uehara, T., Hirose, S. and Saito, T.: “An Interactive Logic Synthesis System based upon AI Techniques”, 19th Design Automation Conf. (1982) 858.

  7. Saito, T., Uehara, T. and Kawato, N.: “A CAD System for Logic Design Based on Frames and Demons”, Proc. 18th Design Automation Conf. (1981) 451.

  8. Clocksin, W. F. and Mellish, C. S.: “Programming in Prolog” (Springer-Verlag, 1981).

  9. Nakashima, H.: “Prolog/KR User’s Manual” (The University of Tokyo, 1982).

  10. Aiello, N., Bock, C., Nii, H. P. and White, W. C.: “AGE Reference Manual” (Stanford University, 1981).

  11. Chikayama, T.: “UTILISP Manual” (The University of Tokyo, 1981).

Download references

Author information

Authors and Affiliations

Authors

About this article

Cite this article

Uehara, T., Kawato, N. Logic circuit synthesis using Prolog. New Gener Comput 1, 187–193 (1983). https://doi.org/10.1007/BF03037425

Download citation

  • Issue Date:

  • DOI: https://doi.org/10.1007/BF03037425

Keywords

Navigation