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Global equivalence proofs for ISTL

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Temporal Logic (ICTL 1994)

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 827))

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Abstract

A version of the temporal logic I STL is used to demonstrate a two-stage approach to refinement of distributed programs. In each refinement, first convenient lower-level computations are shown to implement upper-level operations, and then in the second stage, all other computations are shown to be equivalent to one of the convenient ones. The equivalence maintains the ordering of all causally dependent events, but allows independent events to occur in different orders. The advantage of this separation is that different kinds of reasoning and induction can be used for the two aspects. The approach is demonstrated for a refinement that is part of the development of a cache consistency algorithm where synchrony is gradually loosened among the operations of different processes.

This research was supported by the Fund for the Promotion of Research in the Technion, 120-845.

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Author information

Authors and Affiliations

  1. Computer Science Department, The Technion, Haifa, Israel

    Shmuel Katz

Authors
  1. Shmuel Katz
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Editor information

Dov M. Gabbay Hans Jürgen Ohlbach

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© 1994 Springer-Verlag Berlin Heidelberg

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Katz, S. (1994). Global equivalence proofs for ISTL. In: Gabbay, D.M., Ohlbach, H.J. (eds) Temporal Logic. ICTL 1994. Lecture Notes in Computer Science, vol 827. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0013978

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  • DOI: https://doi.org/10.1007/BFb0013978

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-58241-0

  • Online ISBN: 978-3-540-48585-8

  • eBook Packages: Springer Book Archive

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