A technique to eliminate redundant inter-processor communication on parallelizing compiler TINPAR

Abstract

Optimizing inter-processor(PE) communication is crucial for parallelizing compilers for message-passing parallel machines to achieve high performance. In this paper, we propose a technique to eliminate redundant inter-PE messages. This technique utilizes a data-flow analysis to find a definition point that corresponds to a use point where the definition and the use are occurred in different PEs. If several read accesses occurred in the same PE use the data defined at the same definition point in another PE, redundant inter-PE messages are eliminated as follows: only one inter-PE communication is performed for the earliest read access and the previously received data axe used for the following read accesses. In order to guarantee the consistency of the data, a valid flag and a sent flag are provided for each chunk of received data. The control of these flags is equivalent to the coherence control by the self invalidation on a compiler aided cache coherence scheme.

Research Fellow of the Japan Society for the Promotion of Science