Abstract
Arithmetic coding utilizes the skewness of character distribution by assigning larger intervals (code ranges) to characters having higher probabilities of occurrence. In this paper, we present a scheme to enhance arithmetic coding by utilizing the locality of character reference, i.e., the tendency of consecutive characters to fall within the same type (e.g., alphabets, digits, trailing blanks, successive zeros). The proposed scheme effectively increases the code ranges of individual characters by splitting the interval assignment into different groups. This will decrease the rate of interval narrowing and hence improve the compression efficiency. The paper is concluded by giving the VLSI design of the modified arithmetic coding scheme. Successful VLSI compression chips would be a significant enhancement to the technology of data encoding and would greatly contribute to reducing the cost of data transmission and data access within statistical database systems.
This is a preview of subscription content, log in via an institution to check access.
Preview
Unable to display preview. Download preview PDF.
References
Bassiouni, M. and Mukherjee, A. "Supercomputer algorithms for data transmission and encoding" Proc. 2nd International Conf. on Supercomputing, 1987.
Bassiouni, M. and Ok, B. "Double encoding-a technique for reducing storage requirement of text" J. Information Systems, Vol. 11, No. 2, 1986, pp. 177–184.
Eggers, S. and Shoshani, A. "Efficient access of compressed data" Proc. VLDB, 1980, pp. 205–211.
Eggers, S.; Olken, F. and Shoshani, A. "A compression technique for large statistical databases" Proc. VLDB, 1981, pp. 424–434.
Gonzalez-Smith, M. and Storer, J. "parallel algorithms for data compression" JACM, Vol. 32, No. 2, April 1985, pp. 344–373.
Hawthom, P. "Microprocessor assisted tuple access decompression and assembly for statistical database systems" Proc. VLDB, 1982, pp. 223–233.
Huffman, D. "A method for the construction of minimum redundancy codes" Proc. IRE, Vol. 40, 1952, pp. 1098–1101.
Lea, R. "Text compression with associative parallel processors" The Computer Journal, Vol. 21, No. 1, 1978, pp. 45–56.
Mukherjee, A. and Bassiouni, M. "A VLSI chip for efficient transmission and retrieval of information" Proc. 10th ACM SIGIR International Conf. on Research and Development in Information Retrieval, June 1987, pp. 208–216.
Mukherjee, A. Introduction to nMOS and CMOS VLSI Systems Design. Prentice-Hall, Englewood Cliffs: N.J., 1986.
Welch, t. "A technique for high-preformance data compression" Computer, Vol. 17, No. 6, 1984, pp. 8–19.
Witten, I.; Neal, R. and Cleary, J. "Arithmetic coding for data compression" Communications of ACM, Vol. 30, No. 6, June 1987, pp. 520–540.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1989 Springer-Verlag Berlin Heidelberg
About this chapter
Cite this chapter
Bassiouni, M.A., Ranganathan, N., Mukherjee, A. (1989). Software and hardware enhancement of arithmetic coding. In: Rafanelli, M., Klensin, J.C., Svensson, P. (eds) Statistical and Scientific Database Management. SSDBM 1988. Lecture Notes in Computer Science, vol 339. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0027509
Download citation
DOI: https://doi.org/10.1007/BFb0027509
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-50575-4
Online ISBN: 978-3-540-46045-9
eBook Packages: Springer Book Archive