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Near-optimal scheduling of synchronous data-flow graphs by exact calculation of inter-processor communication costs

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High-Performance Computing and Networking (HPCN-Europe 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1225))

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References

  1. Sih, G. S., Lee, E. A.: A Compile-Time Scheduling Heuristic for Interconnection-Constrained Heterogeneous Processor Architectures. IEEE Trans. Parallel and Distributed Systems, 4(2):175–187, Feb. 1993.

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  2. Rosner, S., Danz, S., Scholles, M.: Minimal Routing in Reconfigurable Communication Networks. Proc. Intl. Conference on Massively Parallel Computing Systems (MPCS), pp. 156–157, May 1996.

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Authors and Affiliations

  1. Fraunhofer-Institute of Microelectronic Circuits and Systems, Grenzstraße 28, 01109, Dresden, Germany

    S. Rosner, M. Scholles & D. Forchel

Authors
  1. S. Rosner
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  2. M. Scholles
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  3. D. Forchel
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Bob Hertzberger Peter Sloot

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© 1997 Springer-Verlag Berlin Heidelberg

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Rosner, S., Scholles, M., Forchel, D. (1997). Near-optimal scheduling of synchronous data-flow graphs by exact calculation of inter-processor communication costs. In: Hertzberger, B., Sloot, P. (eds) High-Performance Computing and Networking. HPCN-Europe 1997. Lecture Notes in Computer Science, vol 1225. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0031677

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  • DOI: https://doi.org/10.1007/BFb0031677

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-62898-9

  • Online ISBN: 978-3-540-69041-2

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