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European Conference on Distributed Memory Computing

EDMCC 1991: Distributed Memory Computing pp 73–79Cite as

Mapping graphs onto a partially reconfigurable architecture

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 487))

Abstract

As we search for a mapping that will avoid the routing of data, our interest in this paper was to characterize the graphs for which there exits a topological mapping onto an RTRN and to simulate the behaviour of an application running onto this machine according to this mapping. After we have determined the kind of graph which is assignable we realize a software tool which simulates the execution of the tasks and which gives a graphical interpretation of the mapping.

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Author information

Authors and Affiliations

  1. Laboratoire Masi, Université Pierre et Marie Curie, 4, place Jussieu, 75252, Paris Cedex 05, France

    Philippe Chrétienne

  2. Onera, Division Calcul Parallèle, BP 72, 92320, Chatillon, France

    Françoise Lamour

Authors
  1. Philippe Chrétienne
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  2. Françoise Lamour
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Editor information

Arndt Bode

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© 1991 Springer-Verlag Berlin Heidelberg

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Chrétienne, P., Lamour, F. (1991). Mapping graphs onto a partially reconfigurable architecture. In: Bode, A. (eds) Distributed Memory Computing. EDMCC 1991. Lecture Notes in Computer Science, vol 487. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0032924

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  • DOI: https://doi.org/10.1007/BFb0032924

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-53951-3

  • Online ISBN: 978-3-540-46478-5

  • eBook Packages: Springer Book Archive

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