Abstract
In this paper we present a VLSI systolic architecture for implementing the multilayer perceptron network. Both the retrieving phase and the backpropagation learning algorithm with a sigmoid nonlinearity are considered. The implementation is based upon a variable size ring systolic array which is highly regular thus favouring integration. This architecture can also be expanded in a parallel or cascade fashion to implement arbitrary size networks.
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© 1991 Springer-Verlag Berlin Heidelberg
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Yáñez, A., Barro, S., Bugarin, A. (1991). Backpropagation multilayer perceptron: A modular implementation. In: Prieto, A. (eds) Artificial Neural Networks. IWANN 1991. Lecture Notes in Computer Science, vol 540. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0035905
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DOI: https://doi.org/10.1007/BFb0035905
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