Abstract
A complete VLSI Continuous Time Bidirectional Associative Memory (BAM) is presented. The short term memory (STM) section is implemented using small transconductance four quadrant multipliers and capacitors for the integrators. The long term memory (LTM) is built with an additional multiplier that uses locally available signals to perform Hebbian Learning. The value of the learned weight voltage can be refreshed using a simple 4 bit A/D-D/A conversion, that if done fast enough will maintain the weight within a 1/16 part of the complete weight range. Such a discretization still allows good performance of the STM section after learning is finished.
Preview
Unable to display preview. Download preview PDF.
References
B. Kosko, “Adaptive Bidirectional Associative Memories”, Applied Optics, Vol. 26, No. 23, pp. 4947–4960, 1 December 1987.
B. Kosko, “Bidirectional Associative Memories”, IEEE Trans. on Systems, Man, and Cybernetics, Vol. 18, No. 1, pp.49–60, January/February 1988.
D.J. Weller and R.R. Spencer, “A Process Invariant Analog Neural Network IC with Dynamically Refreshed Weights”, Proc. Midwest Symposium on Circuits and Systems, Calgary, 1990.
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 1991 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Linares-Barranco, B., Sánchez-Sinencio, E., Rodríguez-Vázquez, A., Huertas, J.L. (1991). Cmos continuous BAM with on chip learning. In: Prieto, A. (eds) Artificial Neural Networks. IWANN 1991. Lecture Notes in Computer Science, vol 540. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0035909
Download citation
DOI: https://doi.org/10.1007/BFb0035909
Published:
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-54537-8
Online ISBN: 978-3-540-38460-1
eBook Packages: Springer Book Archive