Abstract
In this paper we present a new algorithm for wiring layouts in the square grid. This algorithm provides a rather intuitive proof that the number of layers required to wire a given layout W is at most four, and it constructs a two-layer wiring if and only if W requires two layers. The algorithm runs in O(N) time, where N is the number of grid points occupied by the layout. The technique used here can be extended in order to construct wirings of layouts in the tri-hexagonal grid that use at most five layers.
This research was performed while the author was with the Coordinated Science Lab., University of Illinois, Urbana, IL 61801, and was supported in part by the Semiconductor Research Corporation under contract RSCH 84-06-049-6.
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References
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© 1988 Springer-Verlag Berlin Heidelberg
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Tollis, I.G. (1988). A new algorithm for wiring layouts. In: Reif, J.H. (eds) VLSI Algorithms and Architectures. AWOC 1988. Lecture Notes in Computer Science, vol 319. Springer, New York, NY. https://doi.org/10.1007/BFb0040393
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DOI: https://doi.org/10.1007/BFb0040393
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