Abstract
In this paper, we discussed several problems in the design and analysis of hardware algorithms. The complexity theory of logic circuits and parallel computation will form the theoretical foundation of design and analysis of hardware algorithms which will become more important for large VLSI systems.
A formal description method of hardware algorithms will be proposed on a general model of parallel computation. Design tools for hardware algorithms will be developed such as a hardware description language, an automatic translation system from the language to circuits, a verification support system for algorithms, etc. Results of theoretical researches on the circuit complexity will play an important role in the development of these design tools.
Many hardware algorithms will be designed to various problems. Design methodologies such as systolic algorithms or BCA algorithms will become more important and be studied. Since a large system is a combination of software and hardware, a design methodology including design of both software and hardware algorithms will be discussed.
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Yasuura, H., Yajima, S. (1984). Hardware algorithms for VLSI systems. In: Kunii, T.L. (eds) VLSI Engineering. Lecture Notes in Computer Science, vol 163. Springer, Tokyo. https://doi.org/10.1007/BFb0043450
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DOI: https://doi.org/10.1007/BFb0043450
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