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VLSI Engineering pp 174–176Cite as

VLSI verification and correction

  • Chapter 4 VLSI Design And Testing
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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 163))

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References

  • 1980. Roth, J. Paul, “Computer Logic, Testing, and Verification“, COMPUTER SCIENCE PRESS, Rockville, Maryland.

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  • 1982. Roth, J. Paul and Leon S. Levy, “Equivalence of Hardware and Software“, submitted for publication. Cf. IBM Research RC 9716.

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  • 1982. Roth, J. Paul, “Dynamic Partitioning“, IBM Technical Disclosure Bulletin, to appear. Cf. also IBM Research RC 9515.

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  • 1982. Monachino, Michael, “Design Verification System for Large-Scale LSI Designs“, IBM Journal of Research and Development, vol. 26, pp. 100–105.

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Authors and Affiliations

  1. IBM Thomas J. Watson Research Center, 10598, Yorktown Heights, NY

    J. Paul Roth

Authors
  1. J. Paul Roth
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Tosiyasu L. Kunii

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© 1984 Springer-Verlag Berlin Heidelberg

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Roth, J.P. (1984). VLSI verification and correction. In: Kunii, T.L. (eds) VLSI Engineering. Lecture Notes in Computer Science, vol 163. Springer, Tokyo. https://doi.org/10.1007/BFb0043453

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  • DOI: https://doi.org/10.1007/BFb0043453

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  • Publisher Name: Springer, Tokyo

  • Print ISBN: 978-4-431-70002-9

  • Online ISBN: 978-4-431-36817-5

  • eBook Packages: Springer Book Archive

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