Abstract
This paper discusses the memory interface of custom computing machines. We present a high speed parallel memory for the MoM-PDA machine, which is based on the Xputer paradigm. The memory employs DRAMs instead of the more expensive SRAMs. To enhance the memory bandwidth, we use a threefold approach: modern memory devices featuring burst mode, an efficient memory architecture with multiple parallel modules, and memory access optimization for single applications. To exploit the features of the memory architecture, we introduce a strategy to determine optimized storage schemes for a class of applications.
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Hartenstein, R.W., Herz, M., Hoffmann, T., Nageldinger, U. (1998). Exploiting contemporary memory techniques in reconfigurable accelerators. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055246
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DOI: https://doi.org/10.1007/BFb0055246
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