Abstract
Field-programmable gate arrays have been established as a suitable platform for implementing cryptographic algorithms since they provide much of the performance gains achievable through the use of custom hardware, whilst retaining the reconfigurability and ease of development benefits commonly associated with software. However, the efficiency with which a cryptographic algorithm can be implemented on a programmable device is dependent on the architecture of the device itself. Through a discussion of common cryptographic operations, and the implementation and testing of two algorithms, A5 and a reduced block-size variant of Blowfish, the suitability of the XC6200-series architecture for cryptographic applications is evaluated.
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Charlwood, S., James-Roxby, P. (1998). Evaluation of the XC6200-series architecture for cryptographic applications. In: Hartenstein, R.W., Keevallik, A. (eds) Field-Programmable Logic and Applications From FPGAs to Computing Paradigm. FPL 1998. Lecture Notes in Computer Science, vol 1482. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055249
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DOI: https://doi.org/10.1007/BFb0055249
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