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Compiling graphical real-time specifications into silicon

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Formal Techniques in Real-Time and Fault-Tolerant Systems (FTRTFT 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1486))

Abstract

The basic algorithms underlying an automatic hardware synthesis environment using fully formal graphical requirements specifications as source language are outlined. The source language is real-time symbolic timing diagrams [3], which are a metric-time temporal logic such that hard real-time constraints have to be dealt with.

While automata-theoretic methods based on translating the specification to a finite automaton and constructing a winning strategy in the resulting Ω-regular game could in principle be used, and do indeed provide the core algorithm, complexity withstands practical application of these methods. Therefore, a compositional extension is explored, which yields modular synthesis of multi-component controllers. Based on this, a second extension is proposed for efficiently dealing with hard real-time constraints.

This article reflects work that has been partially funded by the German Research Council DFG under grant no. Da 205/5-1.

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Authors and Affiliations

  1. Dept. of Computer Science, Carl von Ossietzky UniversitÄt Oldenburg, P.O. Box 2503, D-26111, Oldenburg, Germany

    Martin FrÄnzle & Karsten Lüth

Authors
  1. Martin FrÄnzle
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  2. Karsten Lüth
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Anders P. Ravn Hans Rischel

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© 1998 Springer-Verlag Berlin Heidelberg

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FrÄnzle, M., Lüth, K. (1998). Compiling graphical real-time specifications into silicon. In: Ravn, A.P., Rischel, H. (eds) Formal Techniques in Real-Time and Fault-Tolerant Systems. FTRTFT 1998. Lecture Notes in Computer Science, vol 1486. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0055354

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  • DOI: https://doi.org/10.1007/BFb0055354

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-65003-4

  • Online ISBN: 978-3-540-49792-9

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