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On predicting data cache behavior for real-time systems

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Book cover Languages, Compilers, and Tools for Embedded Systems (LCTES 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1474))

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Abstract

In the presence of data or combined data/instruction caches there can be memory references that may access multiple memory locations such as those used to implement array references in loops. We examine how data dependence analysis and program restructuring methods to increase data locality can be used to determine worst case bounds on cache misses. To complement these methods we present a persistence analysis on sets of possibly referenced memory locations (e.g., arrays). This analysis determines memory locations that survive in the cache thus providing effective and efficient means to compute an upper bound on the number of possible cache misses.

Supported by the Deutsche Forschungsgemeinschaft (DFG).

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Authors and Affiliations

  1. Fachbereich Informatik, Universität des Saarlandes, Postfach 15 11 50, D-66041, Saarbrücken, Germany

    Christian Ferdinand & Reinhard Wilhelm

Authors
  1. Christian Ferdinand
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  2. Reinhard Wilhelm
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Frank Mueller Azer Bestavros

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© 1998 Springer-Verlag Berlin Heidelberg

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Ferdinand, C., Wilhelm, R. (1998). On predicting data cache behavior for real-time systems. In: Mueller, F., Bestavros, A. (eds) Languages, Compilers, and Tools for Embedded Systems. LCTES 1998. Lecture Notes in Computer Science, vol 1474. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0057777

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  • DOI: https://doi.org/10.1007/BFb0057777

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  • Print ISBN: 978-3-540-65075-1

  • Online ISBN: 978-3-540-49673-1

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