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Limited preemptible scheduling to embrace cache memory in real-time systems

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Languages, Compilers, and Tools for Embedded Systems (LCTES 1998)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1474))

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Abstract

In multi-tasking real-time systems, inter-task cache interference due to preemptions degrades system performance and predictability, complicating system design and analysis. To address this problem, we propose a novel scheduling scheme, called LPS (Limited Preemptible Scheduling), that limits preemptions to predetermined points with small cache-related preemption costs. We also give an accompanying analysis method that determines the schedulability of a given task set under LPS. By limiting preemption points, the proposed LPS scheme reduces preemption costs and thus increases the system throughput. Experimental results show that LPS can increase schedulable utilization by more than 10 % and save processor time by up to 44 % as compared with a traditional fully preemptible scheduling scheme.

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Frank Mueller Azer Bestavros

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© 1998 Springer-Verlag Berlin Heidelberg

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Lee, S., Lee, CG., Lee, M., Min, S.L., Kim, C.S. (1998). Limited preemptible scheduling to embrace cache memory in real-time systems. In: Mueller, F., Bestavros, A. (eds) Languages, Compilers, and Tools for Embedded Systems. LCTES 1998. Lecture Notes in Computer Science, vol 1474. Springer, Berlin, Heidelberg. https://doi.org/10.1007/BFb0057780

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  • DOI: https://doi.org/10.1007/BFb0057780

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  • Print ISBN: 978-3-540-65075-1

  • Online ISBN: 978-3-540-49673-1

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