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A dynamic fault-tolerant mesh architecture

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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1586))

Abstract

A desired mesh architecture, based on connected-cycle modules, is constructed. To enhance the reliability, multiple bus sets and spare nodes are dynamically inserted to construct modular blocks. Two reconfiguration schemes are associated, and can eliminate the spare substitution domino effect. Simulations show that both schemes provide for increase in reliability over the interstitial redundancy scheme[11] and the multi-level fault tolerance mesh(MFTM)[6], at the same redundant spare ratio. Especially, with global reconfiguration, the reliability improvement ratio per spare (RIPS) can be at least twice of that of the MFTM scheme. Furthermore, the lower port complexity in spare nodes as compared to those in both of the aforementioned schemes, and versatility in reconfiguration capability are two additional merits of our proposed architecture.

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José Rolim Frank Mueller Albert Y. Zomaya Fikret Ercal Stephan Olariu Binoy Ravindran Jan Gustafsson Hiroaki Takada Ron Olsson Laxmikant V. Kale Pete Beckman Matthew Haines Hossam ElGindy Denis Caromel Serge Chaumette Geoffrey Fox Yi Pan Keqin Li Tao Yang G. Chiola G. Conte L. V. Mancini Domenique Méry Beverly Sanders Devesh Bhatt Viktor Prasanna

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© 1999 Springer-Verlag

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Huang, JM., Yang, T.C. (1999). A dynamic fault-tolerant mesh architecture. In: Rolim, J., et al. Parallel and Distributed Processing. IPPS 1999. Lecture Notes in Computer Science, vol 1586. Springer, Berlin, Heidelberg . https://doi.org/10.1007/BFb0097926

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  • DOI: https://doi.org/10.1007/BFb0097926

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-65831-3

  • Online ISBN: 978-3-540-48932-0

  • eBook Packages: Springer Book Archive

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