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A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs

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Abstract

Due to the growing demand of digital convergence, there is a need to have a video encoder/decoder (codec) that is capable of supporting multiple video standards on a single platform. High Efficiency Video Coding (HEVC), successor to H.264/MPEG-4 AVC, is a new standard under development that aims to substantially improve coding efficiency compared to AVC High Profile. This paper presents an efficient architecture based on a resource sharing strategy that can perform the quantization operation of the emerging HEVC encoder and six other video encoders: H.264/AVC, AVS, VC-1, MPEG-2, MPEG-4, and Motion JPEG (MJPEG). Since HEVC is still in the drafting stage, the proposed architecture is designed in such a way that any final changes can be accommodated into the design. The proposed quantizer architecture is completely division-free, as the division operation is replaced by shift and addition operations for all the codecs. The design is implemented on an FPGA and later synthesized in CMOS 0.18 μm technology. While working at 190 MHz, the design can decode a 1080p HD video at up to 61 frames per second. The multi-codec architecture is also suitable for low-cost VLSI implementation.

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References

  1. I. Ahmad, X. Wei, Y. Sun, Y. Zhang, Video transcoding: an overview of various techniques and research issues. IEEE Trans. Multimed. 7, 793–804 (2005)

    Article  Google Scholar 

  2. I. Amer, W. Badawy, G. Jullien, A high-performance hardware implementation of the H.264 simplified 8×8 transformation and quantization, in Proc. IEEE Int. Conf. on Acoustics, Speech and Sig. Process., vol. 2 (2005), pp. 1137–1140

    Google Scholar 

  3. CCITT recommendation T.81, digital compression and coding continuous-tone still images (1992)

  4. J. Chen, T. Lee, Higher granularity of quantization parameter scaling and adaptive delta QP signaling, JCTVC-F495, Torino, July 2011

  5. M. Das, K. Wahid, Division-free multi-quantization scheme for modern video codecs. Adv. Multimed. 2012, Article ID: 302893 (2012). Hindawi Publishing, 10 p.

    Article  Google Scholar 

  6. C. Fan, Y.L. Cheng, FPGA implementations of low latency and high throughput 4×4 block texture coding processor for H.264/AVC. J. Chin. Inst. Eng. 32(1), 33–44 (2009)

    Article  MathSciNet  Google Scholar 

  7. A. Fuldseth, G. Bjøntegaard, M. Budagavi, V. Sze, Core transform design for HEVC, JCTVC-G495, Geneva, Nov. 2011

  8. GB/T 20090.1 Information technology—advanced coding of audio and video—Part 1: system, Chinese AVS standard

  9. R. Husemann, M. Majolo, V. Guimaraes, A. Susin, V. Roesler, J.V. Lima, Hardware integrated quantization solution for improvement of computational H.264 encoder module, in Proc. IEEE/IFIP VLSI System on Chip Conf., Sept. (2010), pp. 316–321

    Google Scholar 

  10. ISO/IEC 13818-2:1995: Information technology—generic coding of moving pictures and associated audio information: video

  11. ISO/IEC 14496-2:2004, Information technology—coding of audio-visual objects—Part 2: Visual, MPEG-4 Visual (2004)

  12. Silicon Image Inc., Available [Online] http://www.siliconimage.com/products/index.aspx, May 2011

  13. C. Ju, Y.C. Chang, C.Y. Cheng, C.M. Wang, H.M. Lin, C.C. Chen, F. Chiu, S.J. Wang, A full HD 60 fps AVS/H.264/VC-1/MPEG-2 video decoder for digital home applications, in Proc. Int. Symp. on VLSI Design, Automation and Test (VLSI-DAT), April (2011), pp. 1–4

    Google Scholar 

  14. Z. Khan, A.B. Mansoor, An analysis of quality factor on image steganalysis, in Proc. Informatics and Systems, 7th Int. Conf., March (2010), pp. 1–5

    Google Scholar 

  15. R. Kordasiewicz, S. Shirani, ASIC and FPGA implementations of H.264 DCT and quantization blocks, in Proc. IEEE Int. Conf. on Image Process, Sept. (2005), pp. III-1020-3

    Google Scholar 

  16. R. Kordasiewicz, S. Shirani, Hardware implementation of the optimized transform and quantization blocks of H.264, in Proc. Canadian Conf. on Elect. and Computer Eng., May, vol. 2 (2004), pp. 943–946

    Google Scholar 

  17. S. Kim, H. Chang, S. Lee, K. Cho, VLSI design to unify IDCT and IQ circuit for multistandard video decoder, in Proc. ISIC Int. Symposium on Prototyping (2008), pp. 328–331

    Google Scholar 

  18. J. Lee, H. Kalva, The VC-1 and H.264 Video Compression Standards for Broadband Video Services, 1st edn., vol. 32 (Springer, Berlin, 2008)

    Book  Google Scholar 

  19. S. Lee, K. Cho, Architecture of transform circuit for video decoder supporting multiple standards. Electron. Lett. 44(4), 274–275 (2008)

    Article  Google Scholar 

  20. S. Lee, K. Cho, Circuit implementation for transform and quantization operations of H.264/MPEG-4/VC-1 video decoder, in Proc. Int. Conf. on Design and Technology of Integrated Systems in Nanoscale Era (2007), pp. 102–107

    Google Scholar 

  21. M. Martuza, K. Wahid, Implementation of a cost shared transform architecture for multiple video codecs. J. Real-Time Image Process. (2012). doi:10.1007/s11554-012-0266-5. Springer, 13 pp.

    Google Scholar 

  22. Meeting reports of the Joint Collaborative Team on Video Coding (JCT-VC) on HEVC, Available [Online] http://wftp3.itu.int/av-arch/jctvc-site/

  23. H. Osman, W. Mahjoup, A. Nabih, G.M. Aly, JPEG encoder for low-cost FPGAs, in Proc. Int. Conf. on Comp. Eng. and Syst., Nov. (2007), pp. 406–411

    Google Scholar 

  24. J. Park, T. Ogunfunmi, A new hardware implementation of the H.264 8×8 transform and quantization, in Proc. IEEE Int. Conf. on Acoustics, Speech and Signal Process, April (2009), pp. 585–588

    Google Scholar 

  25. G. Pastuszak, Transforms and quantization in the high-throughput H.264/AVC encoder based on advanced mode selection, in Proc. IEEE Computer Society Annual Symposium on VLSI, April (2008), pp. 203–208

    Google Scholar 

  26. Recommendation ITU-T H.264, ISO/IEC 14496-10:2003, Advanced Video Coding for Generic Audio-Visual Services (2003)

  27. S. Srinivasan, P. Hsu, T. Holcomb, K. Mukerjee, S.L. Regunathan, B. Lin, J. Liang, M.C. Lee, J.R. Corbera, Windows media video 9: overview and applications. Signal Process., Image Commun. 19(9), 851–875 (2004). Research Article

    Article  Google Scholar 

  28. K. Suh, K.Y. Min, K. Kim, J.S. Koh, J.W. Chong, A design of DPCM hybrid coding loop using single 1-d DCT in MPEG-2 video encoder, in Proc. IEEE Int. Symp. on Circuits and Systs., July, vol. 4 (1999), pp. 279–282

    Google Scholar 

  29. Standard for television: VC-1 compressed video bitstream format and decoding process, SMPTE 421 M (2006)

  30. O. Tasdizen, I. Hamzaoglu, A high performance and low cost hardware architecture for H.264 transform and quantization algorithms, in Proc. 13th European Signal Process. Conf., Sept. (2005), pp. 4–8

    Google Scholar 

  31. X. Tran, V.H. Tran, Cost-efficient 130 nm TSMC forward transform and quantization for H.264/AVC encoders, in Proc. IEEE 14th Int. Symp. on Design and Diagnostics of Elect. Circuits and Systs., April (2011), pp. 47–52

    Chapter  Google Scholar 

  32. D. Vo, T.Q. Nguyen, Quality enhancement for motion JPEG using temporal redundancies. IEEE Trans. Circuits Syst. Video Technol. 18(5), 609–619 (2008)

    Article  Google Scholar 

  33. B. Waggoner, Compression for Great Video and Audio, 2nd edn. (Elsevier, Amsterdam, 2009)

    Google Scholar 

  34. L. Yu, F. Yi, J. Dong, C. Zhang, Overview of AVS-video: tools, performance and complexity. J. Vis. Commun. Image Process. 5960, 679–690 (2005)

    Google Scholar 

  35. K. Zhang, Y. Zhu, L. Yu, Area-efficient quantization architecture with zero-prediction method for AVS encoders, in Proc. Picture Coding Symp., Nov. (2007), 4 pp.

    Google Scholar 

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Acknowledgements

The authors would like to acknowledge funding support from the Natural Sciences and Engineering Research Council of Canada (NSERC) for this research work.

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  1. Department of Electrical and Computer Engineering, University of Saskatchewan Saskatoon, Saskatchewan, Canada, S7N5A9

    Mousumi Das & Khan A. Wahid

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  1. Mousumi Das
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  2. Khan A. Wahid
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Correspondence to Khan A. Wahid.

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Das, M., Wahid, K.A. A Cost-Shared Quantization Algorithm and Its Implementation for Multi-Standard Video Codecs. Circuits Syst Signal Process 33, 177–195 (2014). https://doi.org/10.1007/s00034-013-9620-5

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