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A Parallel Systematic Resampling Algorithm for High-Speed Particle Filters in Embedded Systems

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Abstract

In this paper, we propose a parallel systematic resampling (PSR) algorithm for particle filters, which is a new form of systematic resampling (SR). The PSR algorithm makes iterations independent, thus allowing the resampling algorithm to perform loop iterations in parallel. A fixed-point version of the PSR algorithm is also proposed, with a modification to ensure that a correct number of particles is generated. Experiments show that the fixed-point implementation of the PSR algorithm can use as few as 22 bits for representing the weights, when processing 512 particles, while achieving results equivalent to a floating-point SR implementation. Four customized instructions were designed to accelerate the proposed PSR algorithm in Application-Specific Instruction-set Processors. These four custom instructions, when configured to support four weight inputs in parallel, lead to a 73.7\(\times \) speedup over a floating-point SR implementation on a general-purpose processor at a cost of 47.3 K additional gates.

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Acknowledgments

This work was partly supported by the GEOIDE Network Center of Excellence, by Team Grants from the Fonds de Recherche du Québec—Nature et Technologies, and by the Canada Research Chair program.

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Authors and Affiliations

  1. Department of Computer and Software Engineering, Polytechnique Montréal, Montréal, Canada

    Qifeng Gan & J. M. Pierre Langlois

  2. Department of Electrical Engineering, Polytechnique Montréal, Montréal, Canada

    Yvon Savaria

Authors
  1. Qifeng Gan
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  2. J. M. Pierre Langlois
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  3. Yvon Savaria
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Correspondence to Qifeng Gan.

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Gan, Q., Langlois, J.M.P. & Savaria, Y. A Parallel Systematic Resampling Algorithm for High-Speed Particle Filters in Embedded Systems. Circuits Syst Signal Process 33, 3591–3602 (2014). https://doi.org/10.1007/s00034-014-9820-7

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  • DOI: https://doi.org/10.1007/s00034-014-9820-7

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