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Sign Detection and Number Comparison on RNS 3-Moduli Sets \(\{2^n-1, 2^{n+x}, 2^n+1\}\)

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Abstract

Number comparison, sign identification and overflow detection are important operations, especially for digital signal processing, but hard to perform using the residue number system (RNS). In this paper, a new method is proposed for sign identification and number comparison based on an optimized version of the mixed radix conversion for the augmented 3-moduli sets \(\{2^n+1, 2^n-1, 2^{n+x}\} (0 \le x \le n)\). Notably, most of the computations are directly performed on the moduli channels, thus allowing to easily adapt this new method to any RNS processor. Accordingly, this paper proposes an efficient unified very large scale integration architecture based on the presented methodology, which can be used not only to design application specific integrated circuits (ASICs) but also to configure field-programmable gate arrays (FPGAs). The implementation results that were obtained using \(65\,\hbox {nm}\) CMOS technologies show that the proposed architecture provided comparators that are more efficient than the related state of the art, by considering as a figure of merit the area time product. More specifically, the considered ASIC and FPGA implementations provide relative improvements in the efficiency of up to 57 and \(38\,\%\), respectively. The experimental assessment also shows that the power consumption of the proposed circuits is significantly lower than the related state of the art, with relative reductions of up to \(50\,\%\).

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Notes

  1. The HDL specification of the proposed architecture will be made publicly available at http://sips.inesc-id.pt/las/prototypes/RNScomparators/.

References

  1. S. Antão, L. Sousa, The CRNS framework and its application to programmable and reconfigurable cryptography. ACM Trans. Archit. Code Optim. 9(4), 1–25 (2013)

    Article  Google Scholar 

  2. K. Barner, G. Arce (eds.), Nonlinear Signal and Image Processing: Theory, Methods, and Applications. Electrical Engineering & Applied Signal Processing (CRC Press, Boca Raton, 2003)

    Google Scholar 

  3. G. Bernocchi, G. Cardarili, A. Nannarelli, M. Re, Low power adaptive filter based on RNS components. in 12th IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3211–3214 (2007)

  4. B.S. Bi, W. Gross, The mixed-radix chinese remainder theorem and its applications to residue comparison. IEEE Trans. Comput. 57(12), 1624–1632 (2008)

    Article  MathSciNet  Google Scholar 

  5. R. Chaves, L. Sousa, Improving residue number system multiplication with more balanced moduli sets and enhanced modular arithmetic structures. IET Comput. Digital Techn. 1(5), 472–480 (2007)

    Article  Google Scholar 

  6. R. Conway, J. Nelson, Fast converter for 3 moduli RNS using new property of CRT. IEEE Trans. Comput. 48(8), 852–860 (1999)

    Article  Google Scholar 

  7. G. Dimauro, S. Impedovo, G. Pirlo, A new technique for fast number comparison in the residue number system. IEEE Trans. Comput. 42(5), 608–612 (1993)

    Article  MathSciNet  Google Scholar 

  8. G. Dimitrakopoulos, D.G. Nikolos, H. Vergos, D. Nikolos, C. Efstathiou, New architectures for modulo \(2^n - 1\) adders. in 12th IEEE International Conference on Electronics, Circuits and Systems (ICECS), pp. 1–4 (2005)

  9. S.T. Eivazi, M. Hosseinzadeh, O. Mirmotahari, Fully parallel comparator for the moduli set \(\{2^n,2^n-1,2^n+1\}\). IEICE Electron. Exp. 8(12), 897–901 (2011)

    Article  Google Scholar 

  10. K. Ibrahim, S. Saloum, An efficient residue to binary converter design. IEEE Trans. Circuits Syst. 35(9), 1156–1158 (1988)

    Article  MATH  Google Scholar 

  11. I. Kouretas, V. Paliouras, A low-complexity high-radix RNS multiplier. IEEE Trans. Circuits Syst. I Regul. Pap. 56(11), 2449–2462 (2009)

    Article  MathSciNet  Google Scholar 

  12. D. Miller, R. Altschul, J. King, J. Polky, Analysis of the residue class core function of akushskii, burcev, and pak, in Residue Number System Arithmetic: Modern Applications in Digital Signal Processing, ed. by S. Soderstrand, W. Jenkins, G. Jullien, F. Taylor (IEEE Press, Piscataway, NJ, 1986)

    Google Scholar 

  13. P.V. Mohan, Evaluation of fast conversion techniques for binary-residue number systems. IEEE Trans. Circuits Syst. I: Fundam. Theory Appl. 45(10), 1107–1109 (1998)

    Article  Google Scholar 

  14. P.V. Mohan, RNS to binary conversion using diagonal function and Pirlo and impedovo monotonic function. Circuits Syst. Signal Process. 35(3), 1063–1076 (2015)

    Article  MathSciNet  Google Scholar 

  15. P.V. Mohan, A.B. Premkumar, RNS-to-binary converters for two four-moduli sets \(\{2^n-1,2^n,2^n+1,2^{n+1}-1\}\) and \(\{2^n-1,2^n,2^n+1,2^{n+1}+1\}\). IEEE Trans. Circuits Syst. I Regul. Pap. 54(6), 1245–1254 (2007)

    Article  MathSciNet  Google Scholar 

  16. B. Parhami, Computer Arithmetic: Algorithms and Hardware Designs, 2nd edn. (Oxford University Press, New York, 2010)

    Google Scholar 

  17. H. Pettenghi, R. Chaves, L. Sousa, RNS reverse converters for moduli sets with dynamic ranges up to (8n+1)-bit. IEEE Trans. Circuits Syst. I Regul. Pap. 60(6), 1487–1500 (2013)

    Article  MathSciNet  Google Scholar 

  18. G. Pirlo, S. Impedovo, A new class of monotone functions of the residue number system. Int. J. Math. Models Methods Appl. Sci. 7(9), 803–809 (2013)

    Google Scholar 

  19. M. Soderstrand, W. Jenkins, G. Jullien, F. Taylor (eds.), Residue Number System Arithmetic: Modern Applications in Digital Signal Processing (IEEE Press, Piscataway, NJ, 1986)

    MATH  Google Scholar 

  20. L. Sousa, Efficient method for magnitude comparison in RNS based on two pairs of conjugate moduli. in IEEE Symposium on Computer Arithmetic, pp. 240–250 (2007)

  21. L. Sousa, P. Martins, Efficient sign identification engines for integers represented in rns extended 3-moduli set \(\{2^n - 1, 2^{n+k}, 2^n + 1\}\). Electron. Lett. 50(16), 1138–1139 (2014)

    Article  Google Scholar 

  22. N. Szabo, R. Tanaka (eds.), Residue arithmetic and its application to computer technology (McGraw-Hill, New York, 1967)

    MATH  Google Scholar 

  23. T. Tay, C. Chip-Hong, J. Low, Efficient VLSI implementation of \(2^{{n}}\) scaling of signed integer in RNS \(\{2^{n}-1, 2^{n},2^{n}+1\}\). IEEE Trans. VLSI Syst. 21(10), 1936–1940 (2013)

    Article  Google Scholar 

  24. T. Tomczak, Fast sign detection for RNS \(\{2^n - 1, 2^n, 2^n + 1\}\). IEEE Trans. Circuits Syst. I Regul. Pap. 55(6), 1502–1511 (2008)

    Article  MathSciNet  Google Scholar 

  25. A. Tyagi, A reduced-area scheme for carry-select adders. IEEE Trans. Comput. 42(10), 1163–1170 (1993)

    Article  Google Scholar 

  26. H. Vergos, C. Efstathiou, D. Nikolos, Diminished-one modulo \(2^n+1\) adder design. IEEE Trans. Comput. 51(12), 1389–1399 (2002)

    Article  MathSciNet  Google Scholar 

  27. B. Vinnakota, V.V.B. Rao, Fast conversion techniques for binary-residue number systems. IEEE Trans. Circuits Systems I Fundam. Theory Appl. 41(12), 927–929 (1994)

    Article  MATH  Google Scholar 

  28. Y. Wang, New chinese remainder theorems. in Signals, Systems and Computers, 1998. Conference Record of the Thirty-Second Asilomar Conference on, vol. 1, vol. 1, pp. 165–171 (1998). doi:10.1109/ACSSC.1998.750847

  29. Y. Wang, S. Xiaoyu, M. Aboulhamid, A new algorithm for RNS magnitude comparison based on New Chinese Remainder Theorem II. in Ninth Great Lakes Symposium on VLSI, pp. 362–365 (1999)

  30. M. Xu, Z. Bian, R. Yao, Fast sign detection algorithm for the RNS moduli set \(\{2^{n+1}-1, 2^{n}-1, 2^{n}\}\). IEEE Trans. VLSI Syst. 23(2), 379–383 (2015)

    Article  Google Scholar 

  31. H.M. Yassine, W.R. Moore, Improved mixed-radix conversion for residue number system architectures. IEE Proc. G Circuits Devices Syst. 138(1), 120–124 (1991)

    Article  Google Scholar 

  32. R. Zimmermann, Efficient VLSI implementation of modulo \(2^n \pm 1\) addition and multiplication. in 14th IEEE Symposium on Computer Arithmetic (ARITH), pp. 158–167 (1999)

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Authors and Affiliations

  1. INESC-ID, Instituto Superior Técnico, Universidade de Lisboa, Rua Alves Redol, 9, 1000-029, Lisbon, Portugal

    Leonel Sousa & Paulo Martins

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  1. Leonel Sousa
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  2. Paulo Martins
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Correspondence to Paulo Martins.

Additional information

This work was supported by national funds through FCT (Fundação para a Ciência e a Tecnologia) under project UID/CEC/50021/2013 and by the Ph.D. Grant with reference SFRH/BD/103791/2014.

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Sousa, L., Martins, P. Sign Detection and Number Comparison on RNS 3-Moduli Sets \(\{2^n-1, 2^{n+x}, 2^n+1\}\) . Circuits Syst Signal Process 36, 1224–1246 (2017). https://doi.org/10.1007/s00034-016-0354-z

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