High-Performance Electronically Tunable Analog Filter Using a Single EX-CCCII

Abstract

In this paper, an electronically tunable mixed-mode analog filter is proposed, which employs only a single active element, namely Extra X Current Controlled Conveyor (EX-CCCII), two capacitors and a single resistor. The proposed circuit uses minimum components, so it is easy to integrate on chip. The circuit provides all four mode operations, namely current mode, voltage mode, transadmittance mode (TAM) and transimpedance mode without changing the circuit configuration. The circuit can provide all the five filter functions: low pass, high pass, band pass, band reject, and all pass by selecting appropriate input signals except the TAM. The parameters of the proposed circuit, i.e. angular frequency (ω_o) and the quality factor (Q) are independent, while ω_o is electronically tunable. The frequency range is 2.29 MHz to 22.9 MHz with a bias current variation from 1 to 100 µA. The effects of non-idealities and parasitics of the active element on the circuit performances are discussed. The results are verified through PSPICE simulation using a 0.18 µm CMOS technology with the supply voltages of ± 0.5 V. The power consumption is 13.5 µW at 1 µA, and 1.35 mW at 100 µA. The experimental setup further validates the theory and simulation results.

Appendix

For VM operation, the in-depth analysis of Eq. (3) of the proposed circuit is considered. In this case, all input currents are removed.

$$ I_{X1} = \frac{{V_{\text{OUT}} - V_{{{\text{IN}}3}} }}{{R_{X1} }} $$

(25)

Applying the KCL at X2 terminal, we get the expression as shown below

$$ V_{\text{OUT}} - V_{{{\text{IN}}3}} = \left( {V' - V_{{{\text{IN}}2}} } \right)sC_{2} R_{X1} $$

(26)

Therefore,

$$ V' = - \left( {\frac{{V_{\text{OUT}} - V_{{{\text{IN}}3}} }}{{sC_{2} R_{X1} }}} \right) + V_{{{\text{IN}}2}} $$

(27)

$$ I_{X2} = \frac{{V_{\text{OUT}} - V'}}{{R_{X2} }} $$

(28)

Using Eqs. (27–28), the expression becomes:

$$ I_{X2} = \frac{1}{{R_{X2} }}\left( {V_{\text{OUT}} + \frac{{V_{\text{OUT}} - V_{{{\text{IN}}3}} }}{{sC_{2} R_{X1} }} - V_{{{\text{IN}}2}} } \right) $$

(29)

Applying the KCL at Y terminal, with the use of Eq. (29)

$$ \left( {V_{\text{OUT}} + \frac{{V_{\text{OUT}} - V_{{{\text{IN}}3}} }}{{sC_{2} R_{X1} }} - V_{{{\text{IN}}2}} } \right) = \left( {V_{{{\text{IN}}1}} - V_{\text{OUT}} } \right)sC_{1} R_{X2} $$

(30)

$$ \left( {V_{\text{OUT}} + \frac{{V_{\text{OUT}} }}{{sC_{2} R_{X1} }} + V_{\text{OUT}} sC_{1} R_{X2} } \right) = V_{{{\text{IN}}1}} sC_{1} R_{X2} + \frac{{V_{{{\text{IN}}3}} }}{{sC_{2} R_{X1} }} + V_{{{\text{IN}}2}} $$

(31)

$$ V_{\text{OUT}} = \frac{{s^{2} C_{1} C_{2} R_{X1} R_{X2} V_{{{\text{IN}}1}} + sC_{2} R_{X1} V_{{{\text{IN}}2}} + V_{{{\text{IN}}3}} }}{{C_{1} C_{2} R_{X1} R_{X2} + sC_{2} R_{X1} + 1}} $$

(32)

For CM operation, the in-depth analysis of Eq. (4) of the proposed circuit is considered. In this case, all input voltages are connected to ground.

$$ I_{X1} = \frac{{V_{\text{OUT}} }}{{R_{X1} }} $$

(33)

$$ I_{X2} = \frac{{V_{\text{OUT}} - V'}}{{R_{X2} }} $$

(34)

Applying the KCL at X2 terminal

$$ I_{{{\text{IN}}2}} = \frac{{V_{\text{OUT}} }}{{R_{X1} }} + V'sC_{2} $$

(35)

$$ V' = \frac{{I_{{{\text{IN}}2}} R_{X1} - V_{\text{OUT}} }}{{sC_{2} R_{X1} }} $$

(36)

Applying the KCL at Y terminal

$$ I_{{{\text{IN}}1}} = \frac{{V_{\text{OUT}} - V'}}{{R_{X2} }} + V_{\text{OUT}} sC_{1} $$

(37)

$$ I_{{{\text{IN}}1}} = \frac{{V_{\text{OUT}} }}{{R_{X2} }} + V_{\text{OUT}} sC_{1} - \left( {\frac{{I_{{{\text{IN}}2}} R_{X1} - V_{\text{OUT}} }}{{sC_{2} R_{X1} R_{X2} }}} \right) $$

(38)

$$ V_{\text{OUT}} = \frac{{I_{{{\text{IN}}1}} \left( {sC_{2} R_{X1} R_{X2} } \right) + R_{X1} I_{{{\text{IN}}2}} }}{{s^{2} C_{1} C_{2} R_{X1} R_{X2} + sC_{2} R_{X1} + 1}} $$

(39)

$$ I_{\text{OUT}} = I_{{{\text{IN}}3}} + I_{X1} $$

(40)

Thus,

$$ I_{\text{OUT}} = I_{{{\text{IN}}3}} + \frac{{I_{{{\text{IN}}1}} \left( {sC_{2} R_{X2} } \right) + I_{{{\text{IN}}2}} }}{{s^{2} C_{1} C_{2} R_{X1} R_{X2} + sC_{2} R_{X1} + 1}} $$

(41)

$$ I_{\text{OUT}} = \frac{{\left( {s^{2} C_{1} C_{2} R_{X1} R_{X2} + sC_{2} R_{X1} + 1} \right)I_{{{\text{IN}}3}} + sC_{2} R_{X2} I_{{{\text{IN}}1}} + I_{{{\text{IN}}2}} }}{{s^{2} C_{1} C_{2} R_{X1} R_{X2} + sC_{2} R_{X1} + 1}} $$

(42)

Now, the simulation results of proposed circuit for VM operation are compared with the theoretical results in Fig. 21.