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A Hardware- and Accuracy-Efficient Approximate Multiplier with Error Compensation for Neural Network and Image Processing Applications

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Abstract

Approximate computing is a promising method for reducing energy dissipation and design complexity in various applications, where high accuracy is not a significant need. This study proposes an efficient approximate multiplier using a full adder as an approximate 4:2 compressor. This simplification reduces power and hardware overheads. While this technique reduces the accuracy to some extent, the multiplier is still more accurate than necessary in real applications like neural networks and image processing. Meanwhile, an efficient error compensation module is presented to promote the accuracy of the proposed approximate multiplier. Accordingly, our design provides an effective compromise between accuracy and hardware metrics. The hardware simulations are conducted using HSPICE with the 7 nm tri-gate FinFET model. Furthermore, the accuracy and quality of the proposed approximate multiplier are evaluated using MATLAB. According to the results, the proposed design provides far better trade-offs between the performance characteristics and preciseness than its counterparts. The proposed design improves the power-delay product, energy-delay product, and figure of merit considering both energy and quality metrics, on average, by 33%, 44%, and 34%. At the same time, it offers comparable accuracy metrics in error-resilient applications when compared to the other high-accuracy approximate multipliers with error recovery modules.

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Data Availability

The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.

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  1. Faculty of Electrical Engineering, Shahid Beheshti University, Tehran, Iran

    Sudeh Shirkavand Saleh Abad & Mohammad Hossein Moaiyeri

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  1. Sudeh Shirkavand Saleh Abad
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Correspondence to Mohammad Hossein Moaiyeri.

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Shirkavand Saleh Abad, S., Moaiyeri, M.H. A Hardware- and Accuracy-Efficient Approximate Multiplier with Error Compensation for Neural Network and Image Processing Applications. Circuits Syst Signal Process 41, 7057–7076 (2022). https://doi.org/10.1007/s00034-022-02110-7

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