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A New Memristive System with Chaotic and Periodic Bursting and Its FPGA Implementation

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Abstract

This paper analyzes the fingerprint characteristics of a memristor model and proves that this memristor model conforms to the definition of generalized memristor. Using this memristor model, a new class of memristive circuit is built. A new memristive system is obtained through the mathematical modeling of the memristive circuit. The equilibrium points and stability of the new memristive system are analyzed by mathematical theory, and the complex dynamic behavior of the system under different parameters is analyzed by using simulation tools such as phase diagram, bifurcation diagram, Lyapunov exponent spectrum and time-domain waveform. Through simulation, it is found that this system can have quasi-periodic, periodic, chaotic and hyperchaotic attractors and wing-variable phenomenon under the change of parameters. The sensitivity of hyperchaos and chaos to the change of initial value is studied, and the phenomena of chaotic bursting and periodic bursting are observed. For physical verification, the hardware implementation of digital circuit based on FPGA is given. The experimental results are consistent with the numerical simulation ones, which prove its physical realizability.

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Data Availability Statement

The datasets analyzed during the current study are available from the corresponding author on reasonable request.

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Acknowledgements

The authors would like to thank the project supported by the National Natural Science Foundation of China (Grant No. 61901169) and the Natural Science Foundation of Hunan Province, China (Grant No. 2019JJ40190).

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Authors and Affiliations

  1. College of Information Science and Engineering, Hunan Normal University, Changsha, 410081, People’s Republic of China

    Qiuzhen Wan, Fei Li, Jiong Liu, Simiao Chen & Zidie Yan

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  1. Qiuzhen Wan
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  2. Fei Li
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  3. Jiong Liu
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  5. Zidie Yan
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Correspondence to Qiuzhen Wan.

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Wan, Q., Li, F., Liu, J. et al. A New Memristive System with Chaotic and Periodic Bursting and Its FPGA Implementation. Circuits Syst Signal Process 42, 623–637 (2023). https://doi.org/10.1007/s00034-022-02136-x

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