Skip to main content
SpringerLink
Log in

Design of a reconfigurable gain low noise amplifier for multistandard receivers in 65 nm technology

Entwicklung eines programmierbaren, rauscharmen Verstärkers für "Multistandard"-Empfänger in 65-nm-CMOS-Technologie

  • Originalarbeit
  • Published:
e & i Elektrotechnik und Informationstechnik Aims and scope Submit manuscript

Zusammenfassung

Die präsentierte Arbeit behandelt die Realisierung eines breitbandigen, rauscharmen, integrierten Verstärkers (LNA) für den Einsatz im Bereich der drahtlosen, mobilen Kommunikation. Die Umsetzung des LNAs erfolgte in einer modernen 65-nm-CMOS-Technologie. Um die geforderte breitbandige Impedanzanpassung bei gleichzeitigem geringen Rauschen zu ermöglichen, wurde negative Rückkopplung eingesetzt. Die simulierte Rauschzahl (NF) betrug 1,94 dBm bei höchster Verstärkung von 25 dB über einen weiten Frequenzbereich von 100 MHz bis 1 GHz. Um möglichst hohe Flexibilität zu gewährleisten, kann die Verstärkung des LNAs über einen Bereich von 11 dB programmiert werden. Die Verstärkerbandbreite beträgt 2 GHz, die Linearität IIP3 ist bei der höchsten Verstärkung −6,5 dBm, und der simulierte Eingangsreflexionskoeffizient S11 ist über das gesamte Frequenzband kleiner als −19 dB. Eine zusätzliche programmierbare Verstärkerstufe (SDC) wurde realisiert, um einen differentiellen Verstärkerausgang zu generieren und den programmierbaren Verstärkungsbereich auf insgesamt 20 dB zu erhöhen.

Summary

This paper presents a broadband variable gain low noise amplifier (LNA) suitable for multistandard receivers. The LNA has been implemented in 65 nm CMOS technology. To provide low noise input impedance matching, a negative-shunt feedback matching has been proposed. This LNA achieves a simulated noise figure less than 1.94 dBm at the highest gain (25 dB) over a wideband frequency (100 MHz–1 GHZ). Furthermore, the gain of the LNA is variable over a wide range of 11 dB and S11 is less than −19 dB over the entire desired frequency band. The −3 dB bandwidth is 2 GHz, the IIP3 is −6.5 dBm at the highest gain. The LNA drains 18.3 mA from a 1.2 V supply and 7.3 mA from a 2.2 V supply. In addition, a single-ended to differential converter (SDC) is presented providing a differential output for the LNA and increasing the gain re-configurability range to 20 dB.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

References

  • Adabi, E., Niknejad, A. M. (2007): CMOS low noise amplifier with capacitive feedback matching, IEEE Custom Integrated Circuits Conference (CICC'07), 643–646

  • Belostotski, L., Haslett, J. W. (2006): Noise figure optimization of inductively degenerated CMOS LNAs with integrated gate inductors, IEEE Transactions on Circuits and Systems I: Regular Papers, 53 (7): 1409–1422

    Article  Google Scholar 

  • Bruccoleri, F., Klumperink, E. A. M., Nauta, B. (2002): Noise cancelling in wideband CMOS LNAs. In: IEEE International of Solid-State Circuits Conference, Digest of Technical Papers (ISSCC'02), 1: 406–407

    Google Scholar 

  • Bruccoleri, F., Klumperink, E. A. M., Nauta, B. (2004): Wide-band CMOS low-noise amplifier exploiting thermal noise canceling. IEEE Journal of Solid-State Circuits, 39 (2): 275–282

    Article  Google Scholar 

  • Chen, W. H., Liu, G., Zdravko, B., Niknejad, A. M. (2008): A highly linear broadband CMOS LNA employing noise and distortion cancellation, IEEE Journal of Solid-State Circuits (IJSSC), 43: 1164–1176

    Article  Google Scholar 

  • Ingels, M., Soens, C., Craninckx, J., Giannini, V., Kim, T., Debaillie, B., Libois, M., Goffioul, M., Van Driessche, J. (2007): A CMOS 100 MHz to 6 GHz software defined radio analog front-end with integrated pre-power amplifier, IEEE 33rd European Solid State Circuits Conference (ESSCIRC), 436–439

  • Liao, Y., Tang, Z., Min, H. (2006): A wide-band CMOS low-noise amplifier for TV tuner application. IEEE Asian Solid-State Circuits Conference (ASSCC'06), Hangzhou, China, 259–262

  • Lou, S., Luong, H. C. (2005): A wideband CMOS variable-gain low-noise amplifier for cable TV tuners. IEEE Asian Solid-State Circuits Conference (ASSCC'05), Hsinchu, China, 181–184

  • Rao, E., Soares, J. N., Noije, W. V. (2003): A methodology for CMOS low noise amplifier design. Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI'03), 14–19

  • Wang, S. B. T., Niknejad, A. M., Brodersen, R. W. (2005): A sub-mW 960-MHz ultra-wideband CMOS LNA. IEEE Radio Frequency integrated Circuits (RFIC) Symposium, Digest of Papers, 35–38

  • Xiao, J., Zhang, G., Li, T., Martinez, J. S. (2007): Low-power fully integrated CMOS DTV tuner front-end for ATSC terrestrial broadcasting. VLSI Design

Download references

Author information

Authors and Affiliations

  1. Carinthia University of Applied Sciences, Villach, Austria

    S. Dali & J. Sturm

Authors
  1. S. Dali
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. J. Sturm
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

About this article

Cite this article

Dali, S., Sturm, J. Design of a reconfigurable gain low noise amplifier for multistandard receivers in 65 nm technology. Elektrotech. Inftech. 127, 78–85 (2010). https://doi.org/10.1007/s00502-010-0725-2

Download citation

  • Received:

  • Accepted:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s00502-010-0725-2

Schlüsselwörter

Keywords

Search

Navigation