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Deterministic reversible MPSoC debugger based on virtual platform execution traces

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Abstract

The increasing complexity of multiprocessor system on chip (MPSoC) makes the software developers life harder when chasing bugs. The debugging process is particularly tedious as it involves analyzing parallel execution flows. Executing a program many times is an integral part of the process in conventional debugging, but the non-determinism due to parallel execution often leads to different execution paths and different behaviors. In this paper, we propose an approach based on simulation, as it is nowadays an integral part of the MPSoC design flow, to ease pin-pointing bugs in a parallel execution. To that aim, we collect traces using a virtual platform, and when an execution fails, re-execute the traces, in either forward or reverse direction. We define a trace model suitable for this task, and detail a strategy for providing forward and reverse execution features to avoid long simulation times during a debug session. We demonstrate experimentally that re-execution is a deterministic process which, when debugging using the usual trial and error developer approach, is much faster than simulation.

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Acknowledgments

The authors would like to acknowledge the financial support of the French Ministry of Industry through the SoCTrace FUI project and the Ministry of Education of Brazil through the CAPES Foundation (Process number: BEX 9063/13-7) for this work.

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Authors and Affiliations

  1. Laboratoire TIMA, Université Grenoble Alpes, 46 Félix Viallet, 38031, Grenoble, France

    Marcos Aurélio Pinto Cunha, Nicolas Fournel & Frédéric Pétrot

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  1. Marcos Aurélio Pinto Cunha
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  2. Nicolas Fournel
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  3. Frédéric Pétrot
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Correspondence to Marcos Aurélio Pinto Cunha.

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Cunha, M.A.P., Fournel, N. & Pétrot, F. Deterministic reversible MPSoC debugger based on virtual platform execution traces. Des Autom Embed Syst 20, 47–63 (2016). https://doi.org/10.1007/s10617-015-9167-8

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  • DOI: https://doi.org/10.1007/s10617-015-9167-8

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