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CTL* model checking on a shared-memory architecture

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Abstract

In this article we present the parallelisation of an explicit-state CTL* model checking algorithm for a virtual shared-memory high-performance parallel machine architecture. The algorithm uses a combination of private and shared data structures for implicit and dynamic load balancing with minimal synchronisation overhead. The performance of the algorithm and the impact that different design decisions have on the performance are analysed using both mathematical cost models and experimental results. The analysis shows not only the practicality and effective speedup of the algorithm, but also the main pitfalls of parallelising model checking for shared-memory architectures.

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Notes

  1. A tree, here, is modelled as a subset of \( \mathbb{N}^*\), where each sequence of \( \mathbb{N}\) uniquely identifies a node of the tree by its pathname.

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Authors and Affiliations

  1. School of Computer Science, University of Manchester, Manchester, United Kingdom

    Cornelia P. Inggs & Howard Barringer

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  1. Cornelia P. Inggs
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  2. Howard Barringer
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Correspondence to Cornelia P. Inggs.

Additional information

*This work was fully supported under a Universities UK ORS award, a University of Manchester School of Computer Science Scholarship, and a South African Harry Crossley Bursary.

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Inggs, C.P., Barringer, H. CTL* model checking on a shared-memory architecture. Form Method Syst Des 29, 135–155 (2006). https://doi.org/10.1007/s10703-006-0008-z

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