Abstract
In recent years, bit-precise reasoning has gained importance in hardware and software verification. Of renewed interest is the use of symbolic reasoning for synthesising loop invariants, ranking functions, or whole program fragments and hardware circuits. Solvers for the quantifier-free fragment of bit-vector logic exist and often rely on SAT solvers for efficiency. However, many techniques require quantifiers in bit-vector formulas to avoid an exponential blow-up during construction. Solvers for quantified formulas usually flatten the input to obtain a quantified Boolean formula, losing much of the word-level information in the formula. We present a new approach based on a set of effective word-level simplifications that are traditionally employed in automated theorem proving, heuristic quantifier instantiation methods used in SMT solvers, and model finding techniques based on skeletons/templates. Experimental results on two different types of benchmarks indicate that our method outperforms the traditional flattening approach by multiple orders of magnitude of runtime.
This is a preview of subscription content, log in via an institution to check access.
Similar content being viewed by others
Notes
We mean quantifier prefixes which cannot be written in a linear fashion, e.g., ∀x∃y… , where y may not depend on x. In the general case, a ‘graph’ of quantifiers is required for such constraints.
This reduces the search-space the solver has to traverse in the worst-case and therefore improves solver performance.
Cf., e.g., the results of previous SMT-Competitions at http://www.smt-comp.org/.
These benchmarks are available at http://www.cprover.org/hardware/.
EBMC is available at http://www.cprover.org/ebmc/.
References
Barrett C, Stump A, Tinelli C (2010) The satisfiability modulo theories library (SMT-LIB). www.SMT-LIB.org
Barrett C, Tinelli C (2007) CVC3. In: Proceedings of CAV. LNCS, vol 4590. Springer, Berlin
Benedetti M (2005) Evaluating QBFs via symbolic skolemization. In: Proceedings of LPAR. LNCS, vol 3452. Springer, Berlin
Biere A (2005) Resolve and expand. In: Proceedings of SAT. LNCS, vol 3542. Springer, Berlin
Brummayer R, Biere A (2009) Boolector: an efficient SMT solver for bit-vectors and arrays. In: Proceedings of TACAS. LNCS, vol 5505. Springer, Berlin
Bruttomesso R, Cimatti A, Franzén A, Griggio A, Sebastiani R (2008) The MathSAT 4 SMT solver. In: Proceedings of CAV. LNCS, vol 5123. Springer, Berlin
Colón M (2005) Schema-guided synthesis of imperative programs by constraint solving. In: Proceedings of international symposium on logic based program synthesis and transformation. LNCS, vol 3573. Springer, Berlin
Cook B, Kroening D, Rümmer P, Wintersteiger CM (2010) Ranking function synthesis for bit-vector relations. In: Proceedings of TACAS. LNCS, vol 6015. Springer, Berlin
Egly U, Seidl M, Woltran S (2009) A solver for QBFs in negation normal form. Constraints 14(1)
Ganesh V, Dill DL (2007) A decision procedure for bit-vectors and arrays. In: Proceedings of CAV. LNCS, vol 4590. Springer, Berlin
Ge Y, de Moura L (2009) Complete instantiation for quantified formulas in satisfiabiliby modulo theories. In: Proceedings of CAV. LNCS, vol 5643. Springer, Berlin
Giunchiglia E, Narizzano M, Tacchella A (2004) QuBE++: an efficient QBF solver. In: Proceedings of FMCAD. LNCS, vol 3312. Springer, Berlin
Goultiaeva A, Iverson V, Bacchus F (2009) Beyond CNF: a circuit-based QBF solver. In: Proceedings of SAT. LNCS, vol 5584. Springer, Berlin
Gulwani S, Srivastava S, Venkatesan R (2009) Constraint-based invariant inference over predicate abstraction. In: Proceedings of VMCAI. LNCS, vol 5403. Springer, Berlin
Harrison J (2009) Handbook of practical logic and automated reasoning. Cambridge University Press, Cambridge
Jain H, Kroening D, Sharygina N, Clarke EM (2008) Word-level predicate-abstraction and refinement techniques for verifying RTL verilog. IEEE Trans CAD Int Circuits Syst 27(2)
Jha S, Gulwani S, Seshia S, Tiwari A (2010) Oracle-guided component-based program synthesis. In: Proceedings of ICSE. ACM, New York
Jobstmann B, Bloem R (2006) Optimizations for LTL synthesis. In: Proceedings of FMCAD. IEEE, New York
Knuth DE, Bendix PB (1970) Simple word problems in universal algebra. In: Proceedings of conference on computational problems in abstract algebra. Pergamon, New York
Lewis HR (1980) Complexity results for classes of quantificational formulas. J Comput Syst Sci 21(3)
Lonsing F, Biere A (2010) Integrating dependency schemes in search-based QBF solvers. In: Proceedings of SAT. LNCS, vol 6175. Springer, Berlin
Manolios P, Srinivasan SK, Vroon D (2007) BAT: the bit-level analysis tool. In: Proceedings of CAV. LNCS, vol 4590. Springer, Berlin
de Moura L, Bjørner N (2007) Efficient E-matching for SMT solvers. In: Proceedings of CADE. LNCS, vol 4603. Springer, Berlin
de Moura L, Bjørner N (2008) Z3: An efficient SMT solver. In: Proceedings of TACAS. LNCS, vol 4963. Springer, Berlin
Pnueli A, Rosner R (1989) On the synthesis of a reactive module. In: Proceedings of POPL. ACM, New York
Podelski A, Rybalchenko A (2004) A complete method for the synthesis of linear ranking functions. In: Proceedings of VMCAI. LNCS, vol 2937. Springer, Berlin
Solar-Lezama A, Jones CG, Bodík R (2008) Sketching concurrent data structures. In: Proceedings of PLDI. ACM, New York
Srivastava S, Gulwani S (2009) Program verification using templates over predicate abstraction. In: Proceedings of PLDI. ACM, New York
Srivastava S, Gulwani S, Foster JS (2010) From program verification to program synthesis. In: Proceedings of POPL. ACM, New York
Staber S, Bloem R (2007) Fault localization and correction with QBF. In: Proceedings of SAT. LNCS, vol 4501. Springer, Berlin
Turing A (1949) Checking a large routine. In: Report of a conference on high speed automatic calculating machines
Wille R, Fey G, Große D, EggersglüßS, Drechsler R (2007) Sword: a SAT like prover using word level information. In: Proceedings of the international conference on VLSI of system-on-chip. IEEE, New York
Acknowledgements
We would like to thank the anonymous reviewers of this paper for their thorough reviewing, which helped greatly improve the quality of this paper. Their comments on theoretical mistakes as well as presentational issues were an invaluable aid in improving this paper.
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
About this article
Cite this article
Wintersteiger, C.M., Hamadi, Y. & de Moura, L. Efficiently solving quantified bit-vector formulas. Form Methods Syst Des 42, 3–23 (2013). https://doi.org/10.1007/s10703-012-0156-2
Published:
Issue Date:
DOI: https://doi.org/10.1007/s10703-012-0156-2