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OpenMP Implementation of SPICE3 Circuit Simulator

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Abstract

In this paper, we describe our experience of creating an OpenMP implementation of the SPICE3 circuit simulator program. Given the irregular patterns of access to dynamic data structures in the SPICE code, a parallelization using current standard OpenMP directives is impossible without major rewriting of the original program. The aim of this work is to present a case study showing the development of a shared memory parallel code with minimum effort. We present two implementations, one with minimal code modification and one without modification to the original SPICE3 program using Intel’s taskq construct. We also discuss the results of the case study in terms of what future compiler tools may be needed to help OpenMP application developers with similar porting goals. Our experiments using SPICE3, based on SRAM model simulation, were compiled by the SUN compiler running on a SunFire V880 UltraSPARC-III 750 MHz and by the Intel icc compiler running on both an IBM Itanium with four CPUs and Intel Xeon of two processors machines. The results are promising.

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Authors and Affiliations

  1. Department of Computer Science and Information Engineering, Providence University, Taichung, Taiwan, R.O.C

    Tien-Hsiung Weng & Ruey-Kuen Perng

  2. Department of Computer Science, University of Houston, Houston, TX, USA

    Barbara Chapman

Authors
  1. Tien-Hsiung Weng
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  2. Ruey-Kuen Perng
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  3. Barbara Chapman
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Correspondence to Tien-Hsiung Weng.

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Weng, TH., Perng, RK. & Chapman, B. OpenMP Implementation of SPICE3 Circuit Simulator. Int J Parallel Prog 35, 493–505 (2007). https://doi.org/10.1007/s10766-007-0053-2

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  • DOI: https://doi.org/10.1007/s10766-007-0053-2

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