Skip to main content
Log in

An Efficient Dictionary Organization for Maximum Diagnosis

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

The major problem of fault diagnosis with a fault dictionary is the enormous amount of data. The technique used to manage this data can have a significant effect on the outcome of the fault diagnosis procedure. If information is removed from a fault dictionary in order to reduce the size of the dictionary, its ability to diagnose stuck-at faults and unmodeled faults may be severely debased. Therefore, we focus on methods for producing a dictionary that is both small and lossless-compacted.

We propose an efficient dictionary for maximum diagnosis, which is called SD-Dictionary. This dictionary consists of a static sub-dictionary and a dynamic sub-dictionary in order to make a smaller dictionary while maintaining the critical information needed for the diagnostic ability. Experimental results on ISCAS’ 85, ISCAS’ 89 and ITC’ 99 benchmark circuits show that the size of the proposed dictionary is substantially reduced, while the dictionary retains most or all of the diagnostic capability of the full dictionary.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Similar content being viewed by others

References

  1. M. Abramovici, M.A. Breuer, and A.D. Friedman, Digital Systems Testing and Testable Design, Computer Science Press, 1990.

  2. J.A. Waicukauski and E. Lindbloom, “Failure Diagnosis of Structured VLSI,” IEEE Design and Test of Computers, 1989, pp. 49–60.

  3. B. Chess and T. Larrabee, “Creating Small Fault Dictionaries,” IEEE Transactions on Computer-Aided Design, 1999, pp. 346–356.

  4. V. Boppana and W.K. Fuchs, “Fault Dictionary Compaction by Output Sequential Removal,” in Proceedings of IEEE international Conference on Computer Aided Design, 1994, pp. 576–579.

  5. V. Boppana, I. Hartanto, and W.K. Fuchs, “Full Fault Dictionary Storage Based on Labeled Tree Encoding,” IEEE Transactions on Computer-Aided Design, 1998, pp. 255–268.

  6. I. Pomeranz and S. M. Reddy, “On the Generation of Small Dictionaries for Fault Location,” in Proceedings of IEEE international Conference on Computer Aided Design, 1992, pp. 272–279.

  7. I. Pomeranz and S. M. Reddy, “On Dictionary-Based Fault Location in Digital Logic Circuit,” IEEE Transactions on Computers, 1997, pp. 48–59.

  8. D. B. Lavo and T. Larrabee, “Making Cause-Effect Cost Effective: Low-Resolution Fault Dictionaries,” in Proceedings of IEEE international Test Conference, 2001, pp. 278–286.

  9. P. G. Ryan and W.K. Fuchs, “Dynamic Fault Dictionaries and Two-Stage Fault Isolation,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1998, pp. 176–180.

  10. D. Daushik and G. Arun, “Failure Analysis For Full-Scan Circuits,” in Proceedings of IEEE international Test Conference, 1995, pp. 636–645.

  11. R.P. Kunda, “Fault Location in Full-Scan Designs,” in Proceedings of IEEE international Test Conference, 2001, pp. 121–12.

  12. P.G. Ryan, W.K. Fuch, and I. Pomeranz, “Fault Dictionary Compression and Equivalence Class computation for Sequential Circuits,” in Proceedings of IEEE international Conference on Computer Aided Design, 1993, pp. 508–511.

  13. S.D. Millman, E.J. McCluskey, and J.M. Acken, “Diagnosing CMOS bridging faults with stuck-at fault dictionaries,” in Proceedings of IEEE international Test Conference, 1999, pp. 860–870.

  14. Y. Gong and S. Chakravarty, “Locating Bridging Faults Using Dynamically Computed Stuck-at Fault Dictionaries,” IEEE Transactions on Computer-Aided Design, 1998, pp. 876–887.

  15. C. Lin and K. Chakrabarty, “Compact dictionaries for fault diagnosis in scan-BIST,” IEEE Transactions on Computers, 2004, pp. 775–780.

  16. H. Takahahi, K.O. Boateng, K.K. Saluja, and Y. Takamatsu, “On Diagnosing Multiple Stuck-at Faults Using Multiple and Single Fault Simulation in Combinational Circuits,” IEEE Transactions on Computer-Aided Design, 2002, pp. 362–368.

  17. D.B. Lavo, B. Chess, T. Larrabee, F.J. Ferguson, J. Saxena, and K. Butler, “Bridging Fault Diagnosis in the Absence of Physical Information,” in Proceedings of the International Test Conference, 1997, pp. 887–893.

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Sunghoon Chun.

Additional information

This work was supported by the “System IC 2010” project of Korea Ministry of Science and Technology and Ministry of Commerce, Industry and Energy.

Editor: Y. Takamatsu

Sunghoon Chun received the B.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 2002. He was a Reseach Engineer with ASIC Research Center in Yonsei University. He researched for test methodologies for SoC. He received the M.S. degrees in Electrical and Electronic Engineering from Yonsei University in 2005. He is currently working toward Ph.D. degree in Electrical and Electronic Engineering at Yonsei University. His area of interests includes SoC testing, delay testing, fault diagnosis, functional testing for processor based system and test methodologies for signal integrity faults.

Sangwook Kim received the B.S., and M.S. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 1999, and 2001, respectively. He researched for Digital Signal Processor design and fault diagnosis of VLSI. He is a Research Engineer with SoC Design Group of System IC Division in LG Electronics, Inc. He is currently interested in SoC design for HDTV and design verification.

Hong-Sik Kim was born in Seoul, Korea, on April 4, 1973. He received the B.S., M.S. and Ph.D. degrees in Electrical and Electronic Engineering from Yonsei University, Seoul, Korea, in 1977, 1999, and 2004, respectively. He was a Post-Doctorial Fellow with the Institute of Virginia Technology. He is currently working on System LSI Group in the Samsung Electronics. His current research interest includes design-for-testability, built-in self tests and fault diagnosis.

Sungho Kang received the B.S. degree from Seoul National University, Seoul, Korea, and the M.S. and Ph.D. degrees in electrical and computer engineering from The University of Texas at Austin. He was a Post-Doctorial Fellow with the University of Texas at Austin, a Research Scientist with the Schlumberger Laboratory for Computer Science, Schlumberger Inc., and a Senior Staff Engineer with the Semiconductor Systems Design Technology, Motorola Inc. Since 1994, he has been an Associate Professor with the Department of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea. His current research interests include VLSI design, VLSI CAD and VLSI testing and design for testability.

Rights and permissions

Reprints and permissions

About this article

Cite this article

Chun, S., Kim, S., Kim, HS. et al. An Efficient Dictionary Organization for Maximum Diagnosis. J Electron Test 22, 37–48 (2006). https://doi.org/10.1007/s10836-006-5854-x

Download citation

  • Received:

  • Revised:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-006-5854-x

Keywords

Navigation