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Adaptive Modeling of Analog/RF Circuits for Efficient Fault Response Evaluation

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Abstract

In this paper, we propose a methodology for adaptive modeling of analog/RF circuits. This modeling technique is specifically geared towards evaluating the response of a faulty circuit in terms of its specifications and/or measurements. The goal of this modeling approach is to compute important test metrics, such as fail probability, fault coverage, and/or yield coverage of a given measurement under process variations. Once the models for the faulty and fault-free circuit are generated, we can simply use Monte-Carlo sampling (as opposed to Monte-Carlo simulations) to compute these statistical parameters with high accuracy. We use the error budget that is defined in terms of computing the statistical metrics and the position of the threshold(s) to decide how precisely we need to extract the necessary models. Experiments on LNA and Mixer confirm that the proposed techniques can reduce the number of necessary simulations by factor of 7 respectively, in the computation of the fail probability.

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References

  1. Acar E, Ozev S (2008) Defect oriented testing of RF circuits. IEEE Trans Comput-Aided Des Integr Circuits Syst 27(5):925–931

    Article  Google Scholar 

  2. Akbay JTS, Rumer J, Chaterjee A, Amtsfield J (2006) Alternate test of RF frontend with IP constraints: frequency domain test generation and validation. In: IEEE ITC, pp 1–10

  3. Bonnans J (2006) Numerical optimization: theoretical and practical aspects. Springer, Berlin

    MATH  Google Scholar 

  4. Dominguez M, Ausin J, Duque-Carrillo J, Torelli G (2006) A 1-MHz area efficient on-chip spectrum analyzer for analog testing. J Electron Test (Theory and Application) 22(4–6):437–448

    Article  Google Scholar 

  5. Engin N, Kerkhoff H (2004) Fast fault simulation for non-linear analog circuits. IEEE Des Test Comput 20:40–47

    Article  Google Scholar 

  6. Hamida N, Kaminska B (1993) Analog circuit testing based on sensitivity computation and new circuit modeling. In: IEEE ITC, pp 652–661

  7. Haralampos G, Stratigopoulous D, Drineas P, Slamani M, Makris Y (2007) Non-RF to RF test correlation using learning machines: a case study. In: IEEE VTS, vol 2007, pp 9–14

  8. Hou J, Chatterjee A (2003) Concurrent transient fault simulation for analog circuits. IEEE Trans Comput-Aided Des Integr Circuits Syst 22(10):1385–1398

    Article  Google Scholar 

  9. Hubert X, Rousseuw P, Aelst S (2008) High-breakdown robust multivariate methods. Institute of Mathematical Statistics

  10. Johnson N, Kotz S, Balakrishnan N (1994) Continuous univariate distributions. Wiley, New York

    MATH  Google Scholar 

  11. Jose A, Jenkins K, Reynolds S (2005) On-chip spectrum analyzer for analog built-in self test. In: IEEE VTS, vol 23, pp 131–136

  12. Li X, Gopalakrishnan P, Xu Y, Pileggi T (2004) Robust analog/RF circuit design with projection based posynomial modeling. In: IEEE int. conference on computer-aided design, pp 855–862

  13. Liu F, Ozev S (2007) Efficient simulation of parametric faults for multi stage analog circuits. In: IEEE ITC

  14. Liu F, Ozev S (2007) Statistical test development for analog circuits under high process variations. IEEE Trans CAD 26(8):1465–1477

    Google Scholar 

  15. Liu F, Acar E, Ozev S (2007) Test yield estimation for analog/RF circuits over multiple correlated measurements. In: IEEE ITC

  16. Liu F, Ozev S, Nikolov P (2008) Parametric variability analysis for multi-stage analog circuits using analytical sensitivity modeling. ACM Trans Des Automat Electron Syst 13:1–12

    Article  Google Scholar 

  17. Milor S (1998) A tutorial introduction to research on analog and mixed-signal circuit testing. In: IEEE Trans Circuits Syst II, Analog Digit Signal Process 45:1389–1407

  18. Nagi N, Chatterjee A, Balivada A, Abraham J (1993) Fault-based automatic test generator for linear analog circuits. In: IEEE int. conference on computer-aided design, 1993, pp 88–91

  19. Nocedal J, Wright J (1999) Numerical optimization. Springer, New York

    Book  MATH  Google Scholar 

  20. Rousseuw J, Leroy M (2003) Robust regression and outlier detection. Wiley, New Jersey

    Google Scholar 

  21. Rousseuw P, Driessen K (2006) Computing LTS regression for large data sets. In: Data mining and knowledge discovery. Springer, New York

    Google Scholar 

  22. Shi C, Tian M, Shi G (2006) Efficient DC fault simulation of nonlinear analog circuits: one-step relaxation and adaptive simulation continuation. IEEE Trans Comput-Aided Des Integr Circuits Syst 25(7):1392–1400

    Article  Google Scholar 

  23. Silva E, Gyvez JPD, Gronthoud G (2005) Functional vs. multi-VDD testing of RF circuits. In: IEEE ITC, p 420

  24. Slamani M, Kaminska B (1992) Analog circuit fault diagnosis based on sensitivity computation and functional testing. IEEE Des Test Comput 9:30–39

    Article  Google Scholar 

  25. Slamani M, Kaminska B (1994) Multifrequency testability analysis for analog circuits. In: IEEE VTS, pp 54–59

  26. Sunter S, Nagi N (1999) Test metrics for analog parametric faults. In: IEEE VTS, pp 226–234

  27. Tian M, Shi C (1997) Rapid frequency-domain analog fault simulation under parameter tolerances. In: IEEE design automation conference, pp 275–280

  28. Tian M, Shi R (2000) Worst case tolerance analysis of linear analog circuits using sensitivity bands. IEEE Trans Circuits Syst I, Fundam Theory Appl 47:1138–1145

    Article  Google Scholar 

  29. Yilmaz E, Ozev S (2008) Dynamic test scheduling for analog circuits for improved test quality. In: IEEE int. conference on computer design, pp 227–233

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Correspondence to Gurusubrahmaniyan Subrahmaniyan Radhakrishnan.

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Responsible Editor: M. Sachdev

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Subrahmaniyan Radhakrishnan, G., Ozev, S. Adaptive Modeling of Analog/RF Circuits for Efficient Fault Response Evaluation. J Electron Test 27, 465–476 (2011). https://doi.org/10.1007/s10836-011-5221-z

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  • DOI: https://doi.org/10.1007/s10836-011-5221-z

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