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Optimization of SEU Simulations for SRAM Cells Reliability under Radiation

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Abstract

A simplified RC circuit is used to simulate effects of ionizing particles in a 90 nm SRAM. The main characteristics of the memory cell bit flip are discussed and a SEU criterion is presented. The effect of the surrounded circuit on the struck transistor is also discussed in order to extract parameters characteristic of the SEU occurrence.

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Acknowledgments

We thank Austin Lesea, from Xilinx, San José, USA for his help in this work.

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Authors and Affiliations

  1. IM2NP-UMR CNRS 6242/Université Aix-Marseille, IMT Technopôle de Château—Gombert, 13451, Marseille Cedex 20, France

    K. Castellani-Coulié, H. Aziza, G. Micolau & J-M. Portal

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  1. K. Castellani-Coulié
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  2. H. Aziza
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  3. G. Micolau
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  4. J-M. Portal
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Correspondence to K. Castellani-Coulié.

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Responsible Editor: F. Vargas

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Castellani-Coulié, K., Aziza, H., Micolau, G. et al. Optimization of SEU Simulations for SRAM Cells Reliability under Radiation. J Electron Test 28, 331–338 (2012). https://doi.org/10.1007/s10836-012-5281-8

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  • DOI: https://doi.org/10.1007/s10836-012-5281-8

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