Abstract
In contrast to combinational logic and master clocked sequential logical, asynchronous feedback circuits are partially defined due to analogous meta-stabilities. We present a novel formalism to exactly explore this digitally assisted analog phenomenon in order to build up a representative test bench that is able to enforce race constraints (meta-stable behavior) for non-deterministics, instabilities as well as for oscillations in feedback structures. Further, we introduce our definitions for consistently modeling under state transition graphs, we provide all entities for modeling asynchronous feedback structures and state our proposed methodology with an exemplary asynchronous circuitry. The given example is explained at a high level of abstraction, all data for revision is provided, too. The approach seems to be capable to test for meta-stabilities, analog behavior in feedback digital structures.
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Notes
In topological manner of speaking, a topological hole [45]
If the automaton acts independent of input, then we say that it is an autonomous one.
A trivial one is e.g. an OR gate which is feedback with itself, hence realizing a monotonically increasing function.
Obviously, to observe outputs is essential for testability. Consider that any observation point is marked with τ. Thus τ divides a wire into two pars, one part is assigned with new analog signal information before observation and test resp., and the other part is assigned with old information after observation and test.
In short, to embed and operate partially uniquely
Like e.g., in case of the so called barcodes [10]
Which is observed e.g., by static 0-function-hazards
AND and OR are isomorphic to the Boolean lattice V = {0, p, q, 1}
Here, the literal - stays for the initial state, and should not be confused with the don’t care symbol.
Verbalized: the state ∗ is in \(Z_{RS}^{*}\), if there is no hyper event σ defined to trigger a transition ∗σ
Here, “to conserve a meta-stability” does not apply to an analog meta-stable signal but a digital meta-stable state
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Uygur, G., Sattler, S.M. A Novel Formalism for Partially Defined Asynchronous Feedback Digital Circuits. J Electron Test 29, 697–714 (2013). https://doi.org/10.1007/s10836-013-5410-z
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DOI: https://doi.org/10.1007/s10836-013-5410-z