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Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms

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Abstract

This paper presents an approach for increasing the lifetime of systems implemented on SRAM-based FPGAs, by introducing fault tolerance properties enabling the system to autonomously manage the occurrence of both transient and permanent faults. On the basis of the foreseen mission time and application environment, the designer is supported in the implementation of a system able to reconfigure itself, either by reloading the correct configuration in case of transient faults, or by relocating part of the functionality in presence of permanent faults. The result is a system implementation offering good performance and correct functionality even when faults occur. The proposed approach is evaluated in a case study to highlight the overall characteristics of the final implementation.

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References

  1. Bolchini C, Miele A, Sandionigi C (2011) A novel design methodology for implementing reliability-aware systems on SRAMbased FPGAs. IEEE Trans Comput 60(12):1744–1758

    Article  MathSciNet  Google Scholar 

  2. Bolchini C, Miele A, Sandionigi C (2011) Automated resource-aware floorplanning of reconfigurable areas in partially-reconfigurable FPGA systems. In: proceedings of the international conference field programmable logic and applications, pp 532–538

  3. Bolchini C, Miele A, Sandionigi C (2012) Increasing autonomous fault-tolerant FPGA-based systems’ lifetime. In: Proceedings of the European test symposium, pp 1–6

  4. Bolchini C, Sandionigi C, Fossati L, Codinachs DM (2011) A reliable fault classifier for dependable systems on SRAM-based FPGAs. In: Proceedings of the international on-line testing symposium, pp 92–97

  5. Carmichael C, Fuller E, Blain P, Caffrey M (1999) SEU mitigation techniques for Virtex FPGAs in space application. MAPLD99 poster, p 24

  6. Derakhshan N (2012) Dependable configuration controller for multi FPGA platforms. Master’s thesis, KTH Royal Institute of Technology (Sweden) - Politecnico di Milano (Italy)

  7. Espinosa J, de Andres D, Ruiz JC, Gil P (2012) Tolerating multiple faults with proximate manifestations in FPGA-based critical designs for harsh environments. In: Proceedings of the international conference field programmable logic and applications, pp 292–299

  8. Fossati L, Ilstad J (2011) The future of embedded systems at ESA: towards adaptability and reconfigurability. In: Proceedings of the NASA/ESA conference on adaptive hardware and systems, pp 113–120

  9. Garvie M, Thompson A (2004) Scrubbing away transients and jiggling around the permanent: long survival of FPGA systems through evolutionary self-repair. In: Proceedings of the international on-line test symposium, pp 155–160

  10. ITRS: International Technology Roadmap for Semiconductors. http://www.itrs.net/links/2010itrs/home2010.htm

  11. Iturbe X, Benkrid K, Arslan T, Martinez I, Azkarate M, Santambrogio M (2010) A roadmap for autonomous fault-tolerant systems. In: Proceedings of the conference design and architectures for signal and image processing, pp 311–321

  12. Kang DS, Jhang KS, Oh DS (2010) Design and implementation of a radiation tolerant on-board computer for science technology satellite-3. In: Proceedings of the NASA/ESA conference adaptive hardware and systems, pp 17–23

  13. Kastensmidt FL, Neuberger G, Hentschke R, Carro L, Reis R (2004) Designing fault-tolerant techniques for SRAM-Based FPGAs. IEEE Des Test Comput 21(6):552–562

    Article  Google Scholar 

  14. Kubalík P, Kubátová H (2007) Dependable design technique for system-on-chip. J Syst Archit, Elsevier 54(3–4):452–464

    Google Scholar 

  15. Lach J, Mangione-Smith WH, Potkonjak M (1998) Low over-headfault-tolerant FPGA systems. IEEE Trans Very Large Scale Integration (VLSI) Systems 6(2):212–221

    Article  Google Scholar 

  16. Mitra S, Huang WJ, Saxena N, Yu SY, McCluskey E (2004) Reconfigurable architecture for autonomous self-repair. IEEE Des Test Comput 21:228–240

    Article  Google Scholar 

  17. Montminy DP, Baldwin RO, Williams PD, Mullins BE (2007) Using relocatable bitstreams for fault tolerance. In: Proceedings of the NASA/ESA conference adaptive hardware and systems, pp 701–708

  18. Noji R, Fujie S, Yoshikawa Y, Ichihara H, Inoue T (2010) An FPGA-based fail-soft system with adaptive reconfiguration. In: Proceedings of the international on-line testing symposium, pp 127–132

  19. Srinivasan S, Gayasen A, Vijaykrishnan N, Kandemir MT, Xie Y, Irwin MJ (2004) Improving soft-error tolerance of FPGA configuration bits. In: Proceedings of the international conference computer-aided design, pp 107–110

  20. Triple3 redundant spacecraft subsystems (T3RSS). http://www.redefine.com/projects/t3rss/

  21. Xilinx Inc: http://www.xilinx.com

  22. Yu SY, McCluskey EJ (2001) Permanent fault repair for FPGAs with limited redundant area. In: Proceedings of the international symposium on defect and fault tolerance in VLSI systems, pp 125–133

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Authors and Affiliations

  1. Dipartimento di Elettronica Informazione e Bioingegneria, Politecnico di Milano, Piazza Leonardo da Vinci 32, 20133, Milano, Italy

    Cristiana Bolchini & Antonio Miele

  2. CEA, LIST, Embedded Computing Laboratory, 91191, Gif-sur-Yvette, Cedex, France

    Chiara Sandionigi

Authors
  1. Cristiana Bolchini
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  2. Antonio Miele
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  3. Chiara Sandionigi
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Correspondence to Antonio Miele.

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Responsible Editor: M. Violante

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Bolchini, C., Miele, A. & Sandionigi, C. Autonomous Fault-Tolerant Systems onto SRAM-based FPGA Platforms. J Electron Test 29, 779–793 (2013). https://doi.org/10.1007/s10836-013-5418-4

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  • DOI: https://doi.org/10.1007/s10836-013-5418-4

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