Skip to main content
SpringerLink
Log in

A Novel Built-in Current Sensor for N-WELL SET Detection

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

This paper presents and evaluates a new built-in current sensor used to detect n-well single-event transients (SETs) induced by radiation strikes in integrated circuits (IC). A 28 nm bulk CMOS test chip containing the proposed sensor design was irradiated by two-photon absorption lasers. Both simulation and experimental data confirm the validity of the proposed design and demonstrate that it can be used for SET detection in advanced technology nodes. Simulation results also demonstrate that this structure has increased SET detection capability and the capability is more sensitive to voltage and temperature variations when compared to the reference design.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8

Similar content being viewed by others

References

  1. Amusan OA, Witulski AF, Massengill LW, Bhuva BL, Fleming PR, Alles ML, Sternberg AL, Black JD, Schrimpf RD (2006) Charge collection and charge sharing in a 130 nm CMOS technology. IEEE Trans Nucl Sci 53(6):3253–3258

    Article  Google Scholar 

  2. Balasubramanian A, Bhuva BL, Black JD, Massengill LW (2005) RHBD techniques for mitigating effects of single-event hits using guard-gates. IEEE Trans Nucl Sci 52(6):2531–2535

    Article  Google Scholar 

  3. Baumann R (2005) “Soft errors in advanced computer systems. IEEE Des Test Comput 22(3):258–266

  4. Calin T, Nicolaidis M, Velazco R (1996) Upset hardened memory design for submicron CMOS technology. IEEE Trans Nucl Sci 43(6):2874–2878

    Article  Google Scholar 

  5. Chen L, Zhichao Z and Tao W (2013) Methods and devices for detecting single-event transients. U.S. patent no. 8,451,028. 28 May 2013

  6. Dodd PE, Massengill LW (2003) Basic mechanism and modeling of single-event upset in digital microelectronics. IEEE Trans Nucl Sci 50(3):583–602

  7. Gadlage MJ, Schrimpf RD, Benedetto JM, Eaton PH, Mavis DG, Sibley M, Avery K, Turflinger TL (2004) Single event transient pulse widths in digital microcircuits. IEEE Trans Nucl Sci 51(6):3285–3290

    Article  Google Scholar 

  8. Gill B, Nicolaidis M, Wolff F, Papachristou C, Garverick S (2005) An efficient BICS design for SEUs detection and correction in semiconductor memories, Proceedings design, automation and test in Europe, pp.592–597

  9. Katz R, Barto R, McKerracher P, Carkhuff B, Koga R (1994) SEU hardening of field programmable gate arrays (FPGAs) for space applications and device characterization. IEEE Trans Nucl Sci 41(6):2179–2186

    Article  Google Scholar 

  10. Ladbury R (2007) Radiation hardening at the system level. I.E. Nuclear and Space Radiation Effects Conference Short Course Notebook

  11. Leite F, Balen T, Herve M, Lubaszewski M, Wirth G (2009) Using bulk built-in current sensors and recomputing techniques to mitigate transient faults in microprocessors, Proceedings 10th IEEE Latin American Test Workshop, pp. 1–6, 2–5 March

  12. Lilja K, Bounasser M, Wen S-J, Wong R, Holst J, Gaspard N, Jagannathan S, Loveless D, Bhuva B (2013) Single-event performance and layout optimization of flip-flops in a 28-nm bulk technology. IEEE Trans Nucl Sci 60(4):2782–2788

    Article  Google Scholar 

  13. Lisboa CA, Kastensmidt FL, Neto EH, Wirth G, and Carro L (2007) “Using built-in sensors to cope with long duration transient faults in future technologies. Proc Int Test Conf pp. 1–10

  14. Loveless TD et al (2011) Neutron and proton-induced single event upsets for D- and DICE-Flip/Flop designs at a 40nm technology node. IEEE Trans Nucl Sci 58(3):1008–1014

  15. Matush BI, Mozdzen TJ, Clark LT, Knudsen JE (2010) Area-efficient temporally hardened by design flip-flop circuits. IEEE Trans Nucl Sci 57(6):3588–3595

    Google Scholar 

  16. Mavis DG, Eaton PH (2002) Soft error rate mitigation techniques for modern microcircuits. Proc. 40th Annual IEEE Intl Rel Phys Symp, pp. 216–225

  17. Narasimham B, Bhuva BL, Schrimpf RD, Massengill LW, Gadlage MJ, Amusan OA, Holman WT, Witulski AF, Robinson WH, Black JD, Benedetto JM, Eaton PH (2007) Characterization of digital single event transient pulse-widths in 130-nm and 90-nm CMOS technologies. Nucl Sci IEEE Trans Nucl Sci 54(6):2506–2511

  18. Neto EH, Ribeiro I, Vieira M, Wirth G (2006) Using bulk built-in current sensors to detect soft errors. IEEE Micro 26:10–18

  19. Normand E (1996) Single event upset at ground level. IEEE Trans Nucl Sci 43(6):2742–2750

    Article  Google Scholar 

  20. Seifert N, Slankard P, Kirsch M, Narasimham B, Zia V, Brookreson C, Vo A, Mitra S, Gill B and Maiz J (2006) Radiation-Induced Soft Error Rates of Advanced CMOS bulk devices. Proc IEEE Intl Rel Phys Symp pp. 215–225

  21. Simionovski A, Wirth G (2014) Simulation evaluation of an implemented set of complementary bulk built-in current sensors with dynamic storage cell. IEEE Trans. Dev Mat Reliab 14(1):255–261

  22. Wang H-B, Bi J-S, Li M-L, Chen L, Liu R, Li Y-Q, He A-L, Guo G (2014) An area efficient SEU-tolerant latch design. IEEE Trans Nucl Sci 61(6):3660–3666

    Article  Google Scholar 

  23. Wang H-B, Li Y-Q, Chen L, Li L-X, Liu R, Baeg S, Mahatme N, Bhuva BL, Wen S-J, Wong R, Fung R (2015) An SEU-tolerant DICE latch design with feedback transistors. IEEE Trans Nucl Sci 62(2):548–554

    Article  Google Scholar 

  24. Wirth G, Fayomi C (2007) The bulk built-in current sensor approach for single event transient detection. Proc. Int Symp Syst Chip 1–4

  25. Zhang Z, Wang T, Chen L, Yang J (2010) A new bulk built-in current sensing circuit for single-event transient detection. Proc. 23rd Canadian Conference on Electrical and Computer Engineering (CCECE), pp 1–4

Download references

Acknowledgments

The University of Saskatchewan appreciates the support from Natural Science and Engineering Research Council of Canada, and CMC Microsystems. This project is in part supported by NSFC under contract No. 61504038.

Author information

Authors and Affiliations

  1. University of Saskatchewan, 57 Campus Drive, Saskatoon, SK, S7N 5A9, Canada

    H.-B. Wang, R. Liu, L. Chen, M.-L. Li & Y.-Q. Li

  2. College of IOT Engineering, Hohai University, Changzhou, 213022, China

    H.-B. Wang

  3. Institute of Microelectronics, Chinese Academy of Sciences, Beitucheng West Road, Chaoyang District, Beijing, 100029, China

    J.-S. Bi

Authors
  1. H.-B. Wang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. R. Liu
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. L. Chen
    View author publications

    You can also search for this author in PubMed Google Scholar

  4. J.-S. Bi
    View author publications

    You can also search for this author in PubMed Google Scholar

  5. M.-L. Li
    View author publications

    You can also search for this author in PubMed Google Scholar

  6. Y.-Q. Li
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to H.-B. Wang.

Additional information

Responsible Editor: K. K. Saluja

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Wang, HB., Liu, R., Chen, L. et al. A Novel Built-in Current Sensor for N-WELL SET Detection. J Electron Test 31, 395–401 (2015). https://doi.org/10.1007/s10836-015-5538-0

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-015-5538-0

Keywords

Search

Navigation